參數(shù)資料
型號(hào)： T5743P6-TGQ
廠商： ATMEL CORP
元件分類(lèi)： 通信及網(wǎng)絡(luò)
英文描述： UHF ASK/FSK Receiver
中文描述： SPECIALTY TELECOM CIRCUIT, PDSO20
封裝： SO-20
文件頁(yè)數(shù)： 4/41頁(yè)
文件大?。?/td> 681K
代理商： T5743P6-TGQ
4
T5743
4569A–RKE–12/02
RF Front-end
The RF front-end of the receiver is a heterodyne configuration that converts the input
signal into a 1 MHz IF signal. According to Figure 3, the front-end consists of an LNA
(low-noise amplifier), LO (local oscillator), a mixer and an RF amplifier.
The LO generates the carrier frequency for the mixer via a PLL synthesizer. The XTO
(crystal oscillator) generates the reference frequency f
XTO
. The VCO (voltage-controlled
oscillator) generates the drive voltage frequency f
LO
for the mixer. f
LO
is dependent on
the voltage at Pin LF. f
LO
is divided by factor 64. The divided frequency is compared to
f
XTO
by the phase frequency detector. The current output of the phase frequency detec-
tor is connected to a passive loop filter and thereby generates the control voltage V
LF
for
the VCO. By means of that configuration V
LF
is controlled in a way that f
LO
/64 is equal to
f
XTO
. If f
LO
is determined, f
XTO
can be calculated using the following formula: f
XTO
= f
LO
/64.
The XTO is a one-pin oscillator that operates at the series resonance of the quartz crys-
tal. According to Figure 4, the crystal should be connected to GND via a capacitor CL.
The value of that capacitor is recommended by the crystal supplier. The value of CL
should be optimized for the individual board layout to achieve the exact value of f
XTO
and
hereby of f
LO
. When designing the system in terms of receiving bandwidth, the accuracy
of the crystal and the XTO must be considered.
Figure 4.
PLL Peripherals
The passive loop filter connected to Pin LF is designed for a loop bandwidth of
BLoop = 100 kHz. This value for BLoop exhibits the best possible noise performance of
the LO. Figure 4 shows the appropriate loop filter components to achieve the desired
loop bandwidth. If the filter components are changed for any reason please notify that
the maximum capacitive load at Pin LF is limited. If the capacitive load is exceeded, a bit
check may no longer be possible since f
LO
cannot settle in time before the bit check
starts to evaluate the incoming data stream. Self polling does therefore also not work in
that case.
f
LO
is determined by the RF input frequency f
RF
and the IF frequency f
IF
using the follow-
ing formula: f
LO
= f
RF
- f
IF
To determine f
LO
, the construction of the IF filter must be considered at this point. The
nominal IF frequency is f
IF
= 1 MHz. To achieve a good accuracy of the filter’s corner fre-
quencies, the filter is tuned by the crystal frequency f
XTO
. This means that there is a
fixed relation between f
IF
and f
LO
. This relation is dependent on the logic level at Pin
MODE.
DVCC
XTO
LF
LFVCC
LFGND
V
C
C10
R1
C9
S
L
V
S
R1 = 820
C9 = 4.7 nF
C10 = 1 nF
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T5744 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:UHF ASK Receiver
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T5744N-TGSY 制造商:Atmel Corporation 功能描述:
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