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參數(shù)資料
| 型號： | T224162B-50 |
| 廠商： | TM Technology, Inc. |
| 英文描述： | 256K x 16 DYNAMIC RAM EDO PAGE MODE |
| 中文描述： | 256K × 16動態(tài)隨機(jī)存儲器EDO公司頁面模式 |
| 文件頁數(shù)： | 2/14頁 |
| 文件大?。?/td> | 143K |
| 代理商： | T224162B-50 |
TE
CH
tm
FUNCTIONAL BLOCK DIAGRAM
T224162B
Taiwan Memory Technology, Inc. reserves the right
P. 2
to change products or specifications without notice.
Publication Date:AUG. 2000
Revision:L
NO.2 CLOCK
GENERATOR
COLUMN.
ADDRESS
BUFFER
REFRESH
CONTROLLER
REFRESH
COUNTER
ROW.
ADDRESS
BUFFERS(9)
NO.1 CLOCK
GENERATOR
CONTROL
LOGIC
DATA-IN BUFFER
DATA-OUT
BUFFER
COLUMN
DECODER
R
D
512 x 512 x 16
MEMORY
ARRAY
SENSE AMPLIFIERS
VO GATING
16
512 x 16
512
A0
A1
A2
A3
A4
A5
A6
A7
A8
512
RAS
CAS
DQ01
.
.
DQ16
OE
16
8
8
9
9
9
9
9
CASH
CASL
WE
Vcc
Vss
PIN DESCRIPTIONS
PIN NO.
SYM.
TYPE
DESCRIPTION
16~19,22~26
A0-A8
Input
Address Input
14
RAS
Input
Row Address Strobe
28
CASH
Input
Column Address Strobe /Upper Byte Control
29
CASL
WE
Input
Column Address Strobe /Lower Byte Control
13
Input
Write Enable
27
OE
Input
Output Enable
2~5,6~10,31~34,36~39
I/O1 - I/O16
Input/ Output Data Input/ Output
1,6,20
Vcc
Supply
Power, 5V
21,35,40
Vss
Ground
Ground
11,12,15,30
NC
-
No Connect
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