參數(shù)資料
型號(hào)： SY89113UMYTR
廠商： MICREL INC
元件分類： 時(shí)鐘及定時(shí)
英文描述： 89113 SERIES, LOW SKEW CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC44
封裝： 7 X 7 MM, LEAD FREE, MO-220, MLF-44
文件頁(yè)數(shù)： 10/14頁(yè)
文件大?。?/td> 522K
代理商： SY89113UMYTR
Micrel, Inc.
SY89113U
December 2007
M9999-120607
hbwhelp@micrel.com or (408) 955-1690
5
Absolute Maximum Ratings
(1)
Supply Voltage (VCC) .......................... –0.5V to +4.0V
Input Voltage
(Differential Input CLK0, CLK1
(4, 5)).. –0.5V to V
CC
Current on Reference Voltage Outputs
Source or sink current on VREF-AC0, VBB1.....±2mA
Termination Current
Source or sink current on VT0 ................±100mA
Input Current
Source or sink current on CLK0, /CLK0 ...±50mA
Lead Temperature (soldering, 20 sec.) .......... +260°C
Storage Temperature (Ts) ................. –65°C to 150°C
Operating Ratings
(2)
Supply Voltage (VCC).................. +2.375V to +2.625V
Ambient Temperature (TA)................ –40°C to +85°C
Package Thermal Resistance
(3)
QFN (
θ
JA)
Still-Air ................................................ 24°C/W
QFN (
ψ
JB)
Junction-to-Board ................................. 8°C/W
DC Electrical Characteristics
(6)
TA = –40°C to +85°C, unless otherwise stated.
Symbol
Parameter
Condition
Min
Typ
Max
Units
VCC
Power Supply
2.375
2.625
V
ICC
Power Supply Current
No load, max. VCC
240
330
mA
RIN
Input Resistance
(CLK0-to-VT)
45
50
55
RDIFF_IN
Differential Input Resistance
(CLK0-to-/CLK0)
90
100
110
VIH
Input High Voltage
(CLK0, /CLK0)
1.2
VCC
V
(CLK1, /CLK1)
Note 4
0.2
VCC
V
Note 5
1.2
3.6
VIL
Input Low Voltage
(CLK0, /CLK0)
0.1
VCC
V
(CLK1, /CLK1)
Note 4
0.2
V
Note 5
0
V
VIN
Input Voltage Swing
(CLK0, /CLK0)
See Figure 1a.
0.1
VCC
V
(CLK1, /CLK1)
See Figure 1a.
0.2
V
VDIFF_IN
Differential Input Voltage Swing
|CLK0-to-/CLK0|
See Figure 1b.
0.2
V
|CLK1-to-/CLK1|
See Figure 1b.
0.4
V
VT0
CLK0-to-VT0
(CLK0, /CLK0)
1.28
V
VREF-AC0
Output Reference Voltage
VCC–1.3
VCC–1.2
VCC–1.1
V
VBB1
Output Reference Voltage
VCC–1.525
VCC–1.425
VCC–1.325
V
Notes:
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not
implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings
conditions for extended periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB.
θ
JA and
Ψ
JB values are determined for a 4-layer board in still-air, unless otherwise stated.
4. SE-TERM not connected.
5. Using single-ended TTL/CMOS input signals, SE-TERM connects to GND. See Figure 4f.
6. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
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