參數(shù)資料
型號(hào): STSMIA832
廠商: 意法半導(dǎo)體
英文描述: 1.8V/2.8V High speed dual differential line receivers, standard mobile imaging architecture (SMIA) decoder deserializer
中文描述: 1.8V/2.8V高速雙差分線路接收器,標(biāo)準(zhǔn)移動(dòng)成像架構(gòu)(SMIA)解碼器,解串器
文件頁(yè)數(shù): 9/23頁(yè)
文件大?。?/td> 403K
代理商: STSMIA832
STSMIA832
Application information
9/23
3
Application information
3.1
Inputs
Technological advancements in deeper submicron processes have lowered the supply
voltage levels of semiconductor devices, creating a design environment where system
board devices may potentially use many different supply voltages, which can ultimately lead
to voltage conflicts. However, STSMIA832 device has been designed to work with a 3.6V
input tolerance. This implies that all input pins (differential inputs and control inputs) can be
connected to 3.6V logic or bus even when power to the device is only 1.8V. The device
would not be damaged.
3.2
Power down mode
STSMIA832 comes equipped with a Power Down mode that permits an exceptionally low
level of power consumption (I
SOFF
= 10 μA maximum), making the device ideal for portable
battery-powered applications as well as for designs with tight thermal budgets.
The low quiescent supply current possible with Power Down mode is especially useful for
products that must use power as efficiently as possible. Low power offers additional benefits
such as low operating temperature, low cost packages and high device reliability. The
device saves significant quiescent power while internal functions are temporarily
suspended.
The activation and de-activation of the power down mode is controlled by the EN pin. The
mode becomes active once a low-level pulse is applied to the EN pin. The maximum
quiescent supply current gets reduced to I
SOFF
= 10 μA maximum. Power Down mode is
initiated by applying a low-level pulse to the EN input of STSMIA832 device. The device
remains in a DC state, drawing minimal power, until EN goes High, at which point it returns
to full operation.
The power saving in the Power Down Mode is obtained by employing the following
techniques:
Figure 8.
STSMIA832 Power down mode
相關(guān)PDF資料
PDF描述
STSMIA832TBR 1.8V/2.8V High speed dual differential line receivers, standard mobile imaging architecture (SMIA) decoder deserializer
STSR2PCD FORWARD SYNCHRONOUS RECTIFIERS SMART DRIVER
STSR2PCD-TR FORWARD SYNCHRONOUS RECTIFIERS SMART DRIVER
STSR2PMCD FORWARD SYNCHRONOUS RECTIFIERS SMART DRIVER
STSR2PMCD-TR FORWARD SYNCHRONOUS RECTIFIERS SMART DRIVER
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