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參數(shù)資料
| 型號： | STSMIA832 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 1.8V/2.8V High speed dual differential line receivers, standard mobile imaging architecture (SMIA) decoder deserializer |
| 中文描述： | 1.8V/2.8V高速雙差分線路接收器，標(biāo)準(zhǔn)移動成像架構(gòu)（SMIA）解碼器，解串器 |
| 文件頁數(shù)： | 8/23頁 |
| 文件大?。?/td> | 403K |
| 代理商： | STSMIA832 |
Pin configuration
STSMIA832
8/23
Frame synchronization
Each image frame begins with frame start synchronization code (SOF) and ends with frame
end synchronization code (EOF). Each line inside the frame begins with line start
synchronization code (SOL) and ends with line end synchronization code (EOL). The period
between EOL code and new SOL code is called line blanking period. Similarly, the time
between EOF code and new SOF code is called frame blanking period. The total size of one
image frame shall be a multiple of 128 bits.
In the beginning of frame and in the end of frame, line synchronization codes are replaced
by the frame synchronization codes. Synchronization signal usage is shown in Figure 4
below. Bit order of the synchronization codes is the same as for data, byte-wise LSB first.
The purpose of logical channels is to separate different data flows, which are interleaved in
the data stream.
The DMA channel identifier number is directly encoded in the 4-byte CCP embedded sync
codes. The CCP receiver will monitor the DMA channel identifier and de-multiplex the
interleaved video streams to their appropriate DMA channel. A maximum of 8 data streams
is supported. Valid channel identifiers are 0 to 7.
X = channel number 0 to 7.
Figure 7.
CCP2 Synchronization codes
Table 2.
Synchronization codes as per SMIA specifications
Name
Synchronization Codes
Notes
SOL
FFH 00H 00H X0H
Line Start Code
EOL
FFH 00H 00H X1H
Line End Code
SOF
FFH 00H 00H X2H
Frame Start Code
EOF
FFH 00H 00H X3H
Frame End Code
Logical Channels
FFH 00H 00H 0XH (to) FFH 00H 00H 7XH
DMA Channel Identifier from Channel 0 to 7
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| STSMIA832TBR | 1.8V/2.8V High speed dual differential line receivers, standard mobile imaging architecture (SMIA) decoder deserializer |
| STSR2PCD | FORWARD SYNCHRONOUS RECTIFIERS SMART DRIVER |
| STSR2PCD-TR | FORWARD SYNCHRONOUS RECTIFIERS SMART DRIVER |
| STSR2PMCD | FORWARD SYNCHRONOUS RECTIFIERS SMART DRIVER |
| STSR2PMCD-TR | FORWARD SYNCHRONOUS RECTIFIERS SMART DRIVER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| STSMIA832TBR | 功能描述:串行器/解串器 - Serdes 1.8V/2.8V High speed Dual Diff Line Recvr RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
| ST-SOLDER-ST1 | 功能描述:烙鐵 FIXTURE FREE SOLDER MACHINE RoHS:否 制造商:Weller 產(chǎn)品:Soldering Stations 類型:Digital, Iron, Stand, Cleaner 瓦特:50 W 最大溫度:+ 850 F 電纜類型:US Cord Included |
| S-TSO-SM-048-A | 制造商:EMULATION 功能描述: 制造商:EMULATION TECH 功能描述:SOCKET-48TSOP-3R |
| S-TSO-SM-048-B | 制造商:Emulation Technology Inc 功能描述:TSOP SOCKET 48POS SMD 制造商:Emulation Technology Inc 功能描述:SOCKET TSOP 48POS SMD 制造商:Emulation Technology Inc 功能描述:TSOP SOCKET, 48POS, SMD; Connector Type:TSOP Socket; Series:-; No. of Contacts:48; Pitch Spacing:0.5mm; Row Pitch:18.4mm; Contact Termination:Surface Mount Vertical; Contact Material:Copper Alloy; Socket Mounting:SMD ;RoHS Compliant: Yes |
| S-TSO-SM-048-B | 制造商:Emulation Technology Inc 功能描述:TSOP SOCKET, 48POS, SMD |
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