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參數(shù)資料
| 型號： | STSMIA832 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 1.8V/2.8V High speed dual differential line receivers, standard mobile imaging architecture (SMIA) decoder deserializer |
| 中文描述： | 1.8V/2.8V高速雙差分線路接收器，標(biāo)準(zhǔn)移動成像架構(gòu)（SMIA）解碼器，解串器 |
| 文件頁數(shù)： | 10/23頁 |
| 文件大?。?/td> | 403K |
| 代理商： | STSMIA832 |
Application information
STSMIA832
10/23
3.3
Power saving at the inputs
All internal blocks of the input circuitry are shutdown by turning off the bias currents for the
subLVDS Receivers. This eliminates the power associated with any dynamic activity on the
input pins. With no pull-up and pull-down resistors, any remaining current drawn by an input
is known as leakage current (I
L
), which ranges from 1 μA to 4 μA typical. But care should be
taken that the driving circuit for the inputs is also switched to a known state and that there
are no transitions on the inputs when the device is in Power Down Mode.
3.4
Switching off digital blocks
To save power, all signals within the device are prevented from switching by resetting all the
digital blocks in the internal circuits. In many designs, a major portion of the total dynamic
power is due to its clock tree, which consists of all the inter-connects that distributes the
clock signal internally. Power drawn varies according to how extensive the tree is. Pulling
the clock input to a static logic level (LOW in this case) is an important way to save power,
especially as the clock frequency is high
3.5
Disabling the outputs
In the power down mode, to save the power due to transition on output flip flops, the Clock
Enable (CE) signal for all the flip-flops is used in the design. All the clock transitions are
ignored when the CE signal is inactive and so the output flip flops do not toggle. The CE
signal is activated once again when the registered outputs need to be operating under
normal conditions. All the outputs (including D1-D8) are driven LOW in the power down
state. This reset state is held as long as the device remains in Power Down mode.
Once having exited the mode, normal operation recommences from the reset state.
3.6
Load capacitance
Power dissipation is proportional to capacitance. The capacitance consists both of internal
and external capacitance. The lumped internal capacitance is associated with the power
dissipated internally by the device and depends on the device characteristics (in
STSMIA832, C
IN
is 4pF). The external capacitance is associated with power dissipated
outside the device and it is a function of PCB traces loading and other IC loads.
In high frequency operation, it is essential to have equal trace lengths for all the output lines
in order to minimize the skew. A reduced external capacitance leads to reduced current
consumption and also reduced rise time and fall time. The parallel output driving
capacitance in STSMIA832 is 10pF and the rise time and fall times for the LVTTL parallel
outputs are 2.2ns maximum.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| STSMIA832TBR | 1.8V/2.8V High speed dual differential line receivers, standard mobile imaging architecture (SMIA) decoder deserializer |
| STSR2PCD | FORWARD SYNCHRONOUS RECTIFIERS SMART DRIVER |
| STSR2PCD-TR | FORWARD SYNCHRONOUS RECTIFIERS SMART DRIVER |
| STSR2PMCD | FORWARD SYNCHRONOUS RECTIFIERS SMART DRIVER |
| STSR2PMCD-TR | FORWARD SYNCHRONOUS RECTIFIERS SMART DRIVER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| STSMIA832TBR | 功能描述:串行器/解串器 - Serdes 1.8V/2.8V High speed Dual Diff Line Recvr RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
| ST-SOLDER-ST1 | 功能描述:烙鐵 FIXTURE FREE SOLDER MACHINE RoHS:否 制造商:Weller 產(chǎn)品:Soldering Stations 類型:Digital, Iron, Stand, Cleaner 瓦特:50 W 最大溫度:+ 850 F 電纜類型:US Cord Included |
| S-TSO-SM-048-A | 制造商:EMULATION 功能描述: 制造商:EMULATION TECH 功能描述:SOCKET-48TSOP-3R |
| S-TSO-SM-048-B | 制造商:Emulation Technology Inc 功能描述:TSOP SOCKET 48POS SMD 制造商:Emulation Technology Inc 功能描述:SOCKET TSOP 48POS SMD 制造商:Emulation Technology Inc 功能描述:TSOP SOCKET, 48POS, SMD; Connector Type:TSOP Socket; Series:-; No. of Contacts:48; Pitch Spacing:0.5mm; Row Pitch:18.4mm; Contact Termination:Surface Mount Vertical; Contact Material:Copper Alloy; Socket Mounting:SMD ;RoHS Compliant: Yes |
| S-TSO-SM-048-B | 制造商:Emulation Technology Inc 功能描述:TSOP SOCKET, 48POS, SMD |
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