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參數(shù)資料
| 型號(hào)： | STR91XF_07 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | ARM966E-S TM 16/32-Bit Flash MCU with Ethernet, USB, CAN, AC motor control, 4 timers, ADC, RTC, DMA |
| 中文描述： | ARM966E - ?商標(biāo)16/32位閃存微控制器與以太網(wǎng)，USB，加拿大，交流電機(jī)控制，4個(gè)定時(shí)器，模數(shù)轉(zhuǎn)換器，RTC和DMA的 |
| 文件頁數(shù)： | 65/73頁 |
| 文件大?。?/td> | 595K |
| 代理商： | STR91XF_07 |
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STR91xF
Electrical characteristics
65/73
6.14.4 I
2
C electrical characteristics
V
DDQ
= 2.7 - 3.6V, V
DD
= 1.65 - 2V, T
A
= -40 / 85 °C unless otherwise specified.
Table 28.
I
2
C Electrical Characteristics
Notes:1 The device must internally provide a hold time of at least 300 ns for the SDA signal in order to
bridge the undefined region of the falling edge of SCL
2 The maximum hold time of the START condition has only to be met if the interface does not
stretch the low period of SCL signal
3 C
b
= total capacitance of one bus line in pF
Symbol
Parameter
Standard I
2
C
Fast I
2
C
Unit
Min
Max
Min
Max
t
BUF
Bus free time between a STOP
and START condition
4.7
1.3
ms
t
HD:STA
Hold time START condition.
After this period, the first clock
pulse is generated
4.0
0.6
μs
t
LOW
t
HIGH
LOW period of the SCL clock
4.7
1.3
μs
HIGH period of the SCL clock
4.0
0.6
μs
t
SU:STA
Set-up time for a repeated
START condition
4.7
0.6
μs
t
HD:DAT
t
SU:DAT
Data hold time
0
0
ns
Data set-up time
250
100
ns
t
R
Rise time of both SDA and SCL
signals
1000
20+0.1C
b
300
ns
t
F
Fall time of both SDA and SCL
signals
300
20+0.1C
b
300
ns
t
SU:STO
Set-up time for STOP condition
4.0
0.6
μs
C
b
Capacitive load for each bus
line
400
400
pF
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| STR91XFA | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:ARM966E-S⑩ 16/32-Bit Flash MCU with Ethernet, USB, CAN, AC motor control, 4 timers, ADC, RTC, DMA |
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