參數(shù)資料
型號: STPCELITE
廠商: 意法半導(dǎo)體
英文描述: X86 Core General Purpose PC Compatible System - on - Chip
中文描述: x86內(nèi)核兼容的通用計(jì)算機(jī)系統(tǒng)-關(guān)于-芯片
文件頁數(shù): 78/87頁
文件大?。?/td> 1356K
代理商: STPCELITE
DESIGN GUIDELINES
78/87
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
Release 1.3 - January 29, 2002
When considering thermal dissipation, one of the
most important parts of the layout is the
connection between the ground balls and the
ground layer.
A 1-wire connection is shown in
Figure 6-25
. The
use of a 8-mil wire results in a thermal resistance
of 105°C/W assuming copper is used (418 W/
m.°K). This high value is due to the thickness (34
μm) of the copper on the external side of the PCB.
Considering only the central matrix of 36 thermal
balls and one via for each ball, the global thermal
resistance is 2.9°C/W. This can be easily
improved using four 12.5 mil wires to connect to
the four vias around the ground pad link as in
Figure 6-26
. This gives a total of 49 vias and a
global resistance for the 36 thermal balls of 0.5°C/
W.
The use of a ground plane like in
Figure 6-27
is
even better.
Figure 6-25. Recommended 1-wire Power/Ground Pad Layout
Solder Mask (4 mil)
Pad for ground ball (diameter = 25 mil)
Hole to ground layer (diameter = 12 mil)
Connection Wire (width = 12.5 mil)
Via (diameter = 24 mil)
345ml
1 mil = 0.0254 mm
Figure 6-26. Recommended 4-wire Ground Pad Layout
4 via pads for each ground ball
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