參數(shù)資料
型號(hào)： STM32F102RBT6TR
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 16 MHz, RISC MICROCONTROLLER, PQFP64
封裝： 10 X 10 MM, 0.50 MM PITCH, ROHS COMPLIANT, LQFP-64
文件頁數(shù)： 9/69頁
文件大?。?/td> 805K
代理商： STM32F102RBT6TR
STM32F102x8, STM32F102xB
Description
Figure 2.
Clock tree
1.
For the USB function to be available, both HSE and PLL must be enabled, with the CPU running at
48 MHz.
2.
To have an ADC conversion time of 1.2 s, APB2 must be at 12 MHz, 24 MHz or 48 MHz.
HSE OSC
4-16 MHz
OSC_IN
OSC_OUT
OSC32_IN
OSC32_OUT
LSE OSC
32.768 kHz
HSI RC
8 MHz
LSI RC
40 kHz
to Independent Watchdog (IWDG)
PLL
x2, x3, x4
PLLMUL
Legend:
MCO
Clock Output
Main
PLLXTPRE
/2
..., x16
AHB
Prescaler
/1, 2..512
/2
PLLCLK
HSI
HSE
APB1
Prescaler
/1, 2, 4, 8, 16
ADC
Prescaler
/2, 4, 6, 8
ADCCLK
PCLK1
HCLK
PLLCLK
to AHB bus, core,
memory and DMA
USBCLK
to USB interface
to TIM2, 3
and 4
USB
Prescaler
/1, 1.5
to ADC
LSE
LSI
HSI
/128
/2
HSI
HSE
peripherals
to APB1
Peripheral Clock
Enable (13 bits)
Enable (3 bits)
Peripheral Clock
APB2
Prescaler
/1, 2, 4, 8, 16
PCLK2
peripherals
to APB2
Peripheral Clock
Enable (11 bits)
48 MHz
48 MHz max
48 MHz
48 MHz max
24 MHz max
to RTC
PLLSRC
SW
MCO
CSS
to Cortex System timer
/8
Clock
Enable (3 bits)
SYSCLK
max
RTCCLK
RTCSEL[1:0]
TIMXCLK
IWDGCLK
SYSCLK
FCLK Cortex
free running clock
TIM2,3, 4
If (APB1 prescaler =1) x1
else
x2
HSE = high-speed external clock signal
HSI = high-speed internal clock signal
LSI = low-speed internal clock signal
LSE = low-speed external clock signal
ai14994
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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STM32F102X6 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Low-density USB access line, ARM-based 32-bit MCU with 16/32 KB Flash, USB FS interface, 5 timers, ADC & 5 communication interfaces
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