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參數(shù)資料
| 型號： | STLR4200S |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | USB/lrDA Bridge Controller |
| 中文描述： | 的USB / lrDA橋控制器 |
| 文件頁數(shù)： | 19/21頁 |
| 文件大?。?/td> | 308K |
| 代理商： | STLR4200S |
3-4200-D1-2.0-0403
19
STIr4200
USB/IrDA Bridge Controller
O F F I C I A L P R O D U C T D O C U M E N T A T I O N
6.1.8.
IRDIG Setup Register
Offset 9
6.1.9.
Test Register
Offset 15
7
6
5
4
3
2
1
0
IRDIG Setup Register
Default State
RXHIGH TXLOW
0
Reserved
0
0
Bit Number Bit Mnemonic Read/Write Access
Function
7
RXHIGH
R/W
When set, this bit inverts the polarity of the data received by the
digital interface on the RXFAST and RXSLOW pins.
When set, this bits inverts the polarity of the data transmitted by
the digital interface on the TXDATA pin.
Reserved
6
TXLOW
R/W
5-0
Reserved
R/W
Table 21. IRDIG Setup Register
7
6
5
4
3
2
1
0
Test Register
Default State
PLLDWN
0
LOOPIR
0
LOOPUSB
0
Reserved
0
TSTOSC(3 : 0)
0
0
0
0
Bit Number Bit Mnemonic Read/Write Access
Function
7
PLLDWN
R/W
When set, powers down the secondary infrared transceiver PLL.
This bit should be cleared for SIR operation. Two independent
PLLs are required in this mode of operation. This bit should be
set for FIR operation since the infrared transceiver uses the USB
PLL in this mode of operation.
When set, puts the infrared transceiver into internal loop back
using the FIFO to buffer data. This bit should be used for chip
debug purposes only.
When set, puts the USB interface into loop back mode using the
FIFO to buffer data. This bit should be used for chip debug
purposes only.
Enables the oscillator to be powered down while in USB Suspend
Mode.
Sets the bias currents for the crystal oscillator circuitry. These bits
should be used for chip debug purposes only.
6
LOOPIR
R/W
5
LOOPUSB
R/W
4
TSTENA
R/W
3-0
TSTOSC(3: 0)
R/W
Table 22. Test Register
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