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參數(shù)資料
| 型號： | STK12C68-45M |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | CMOS NV SRAM 8K X 8 AUTOSTORE NONVOLATILE STATIC RAM |
| 中文描述： | 的CMOS非易失SRAM 8K的乘八自動存儲非易失靜態(tài)RAM |
| 文件頁數(shù)： | 8/10頁 |
| 文件大?。?/td> | 72K |
| 代理商： | STK12C68-45M |
STK12C68-M
4-60
EEPROM
cells. The nonvolatile data can be recalled an
unlimited number of times.
AUTOMATIC RECALL
During power up, or after any low power condition
(V
CAP
< V
SWITCH
), when V
CAP
exceeds the sense
voltage of V
SWITCH
, a
RECALL
cycle will automatically
be initiated. After the initiation of this automatic
RE-
CALL
, if V
CAP
falls below V
SWITCH
, then another
RE-
CALL
operation will be performed whenever V
CAP
again rises above V
SWITCH
.
If the STK12C68-M is in a WRITE state at the end of
power-up RECALL the SRAM data will be corrupted.
To help avoid this situation, a 10K Ohm resistor should
be connected between W and system V
CC
.
HARDWARE PROTECT
The STK12C68-M offers hardware protection against
inadvertent STOREoperation during low voltage
conditions. When V
CAP
< V
SWITCH,
all externally
initiated
STORE
operations will be inhibited.
HSB OPERATION
The Hardware Store Busy pin (HSB) is an open drain
circuit acting as both input and output to perform two
different functions. When driven low by the internal
chip circuitry it indicates that a
STORE
operation (initi-
ated via any means) is in progress within the chip.
When driven low by external circuitry for longer than
t
ASSERT
, the chip will conditionally initiate a
STORE
operation after t
DELAY
.
READ
and
WRITE
operations that are in progress when
HSB is driven low (either by internal or external cir-
cuitry) will be allowed to complete before the
STORE
operation is performed, in the following manner. After
HSB goes low, the part will continue normal
SRAM
operations for t
DELAY
. During t
DELAY
, a transition on
any address or control signal will terminate
SRAM
operation and cause the
STORE
to commence. Note
that if an
SRAM
write is attempted after HSB has been
forced low, the write will not occur and the
STORE
operation will begin immediately.
Hardware-Store-Busy (HSB) is a high speed, low drive
capability bi-directional control line. In order to allow a
bank of STK12C68-Ms to perform synchronized
STORE
functions, the HSB pin from a number of chips may be
connected together. Each chip contains a small inter-
nal current source to pull HSB
HIGH
when it is not being
driven low. To decrease the sensitivity of this signal to
noise generated on the PC board, it may optionally be
pulled to V
CCX
via an external resistor with a value
such that the combined load of the resistor and all
parallel chip connections does not exceed I
HSB_OL
at
V
OL
. Do not connect this or any other pull-up to the
V
CAP
node.
If HSB is to be connected to external circuits other than
other STK12C68-Ms, an external pull-up resistor should
be used.
During any
STORE
operation, regardless of how it was
initiated, the STK12C68-M will continue to drive the
HSB pin low, releasing it only when the
STORE
is
complete. Upon completion of a
STORE
operation, the
part will be disabled until HSB actually goes
HIGH
.
AUTOMATIC STORE OPERATION
During normal operation, the STK12C68-M will draw
current from V
CCX
to charge up a capacitor connected
to the V
CAP
pin. This stored charge will be used by the
chip to perform a single
STORE
operation. After power
up, when the voltage on the V
CAP
pin drops below
V
SWITCH
, the part will automatically disconnect the
V
CAP
pin from V
CCX
and initiate a
STORE
operation.
Figure 1shows the proper connection of capacitors for
automatic store operation. The charge storage capaci-
tor should have a capacity of at least 100
μ
F (
±
20%) at
6V. Each STK12C68-M must have its own 100
μ
F
capacitor. Each STK12C68-M musthave a high
quality, high frequency bypass capacitor of 0.1
μ
F
connected between V
CAP
and V
SS
, using leads and
traces that are as short as possible.
If the AutoStore function is not required, then V
CAP
should be tied directly to the power supply and V
CCX
should be tied to ground. In this mode,
STORE
opera-
tions may be triggered through software control or the
HSB pin. In either event, V
CAP
(Pin 1) mustalways
have a proper bypass capacitor connected to it.
In order to prevent unneeded
STORE
operations, auto-
matic
STOREs
as well as those initiated by externally
driving HSB
LOW
will be ignored unless at least one
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| STK12C68-5C35M | 功能描述:NVRAM 8Kbx8 4.5-5.5V AutoStore RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲容量:1024 Kbit 組織:128 K x 8 接口類型:Parallel 訪問時間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube |
| STK12C68-5C55M | 功能描述:NVRAM 8Kbx8 4.5-5.5V AutoStore RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲容量:1024 Kbit 組織:128 K x 8 接口類型:Parallel 訪問時間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube |
| STK12C68-5K35M | 功能描述:NVRAM 8Kbx8 4.5-5.5V AutoStore RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲容量:1024 Kbit 組織:128 K x 8 接口類型:Parallel 訪問時間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube |
| STK12C68-5K55M | 功能描述:NVRAM 8Kbx8 4.5-5.5V AutoStore RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲容量:1024 Kbit 組織:128 K x 8 接口類型:Parallel 訪問時間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube |
| STK12C68-5L35M | 功能描述:NVRAM 8Kbx8 4.5-5.5V AutoStore RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲容量:1024 Kbit 組織:128 K x 8 接口類型:Parallel 訪問時間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube |
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