
CAE SUPPORT
INTRODUCTION TO STD80/STDM80
STD80/STDM80
1-2
SEC ASIC
CAE SUPPORT
STD80/STDM80 supports popular design platforms
and environments such as Verilog, Viewlogic, Mentor
and Synopsys for front-end logic design capture and
simulation, and ArcCell for back-end placement and
routing.
For a high simulation accuracy, STD80/STDM80 uses
a proprietary delay calculator. Cell delay calculations
are based on a matrix of delay parameters for each
macrocell, and signal interconnection delay is based
on the RC tree analysis.
PRODUCT FAMILY
STD80/STDM80 library include the following design
elements:
(a) Internal Macrocells
(b) Input/Output Cells
(c) Macrofunctions
(d) Megafunctions
(e) Memory Compilers
(f) Datapath Compilers
(g) JTAG Boundary Scans.
< Internal Macrocells >
Macrocells are the lowest level of logic functions such
as NAND, NOR and flip-flop used for logic designs.
There are about 300 different types of internal
macrocells. They usually come in two levels of drive
strength (1X and 2X).
These macrocells have many levels of
representations—logic symbol, logic model, timing
model, transistor schematic, HSPICE netlist, physical
layout, and placement and routing model.
< Macrofunctions >
Macrofunctions are netlists of logic function which
have the complexity of a standard MSI circuit.
Macrofunctions are logic building blocks. There are 44
kinds of 74XX (TTL) compatible functions in this
library.
< Megafunctions >
Megafunctions are also netlists of logic function, but
with a high logic complexity of a standard LSI circuit.
Multipliers, barrel shifters, 82XX Intel functions, etc.
are supported in this library.
< Memory Compilers>
Memory compilers of STDL80 consist of two ROMs
(synchronous contact programmable and synchronous
diffusion programmable), three single-port RAMs
(synchronous and asynchronous) and three dual-port
RAMs (synchronous and asynchronous).
In addition, a Register File and a FIFO are
under-developed.
< Datapath Compilers >
Datapath compilers of STD80/STDM80 consist of 16
macro cells (Adder, ALU, Multiplier, etc.) and 14
primitive cells (NAND, NOR, DFF, LATCH, MUX, etc.)