參數(shù)資料
型號: ST72621J2B1
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP20
封裝: 0.300 INCH, PLASTIC, DIP-20
文件頁數(shù): 52/136頁
文件大?。?/td> 2475K
代理商: ST72621J2B1
ST7262
22/136
Figure 18. Reset Timing Diagram
Note: Refer to Electrical Characteristics for values of tDDR, tOXOV, VIT+ and VIT-.
Figure 19. Reset Block Diagram
Note: The output of the external reset circuit must have an open-drain output to drive the ST7 reset pad.
Otherwise the device can be damaged when the ST7 generates an internal reset (LVD or watchdog).
VDD
OSCIN
fCPU
FFFF
FFFE
PC
RESET
tDDR
tOXOV
514 CPU
CLOCK
CYCLES
DELAY
RESET
RON
VDD
WATCHDOG RESET
LVD RESET
INTERNAL
RESET
PULSE
GENERATOR
200ns
Filter
tw(RSTL)out + 128 fOSC
delay
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