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參數(shù)資料
| 型號： | ST7036 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Dot Matrix LCD Controller/Driver |
| 中文描述： | 點陣LCD控制器/驅(qū)動器 |
| 文件頁數(shù)： | 16/72頁 |
| 文件大?。?/td> | 864K |
| 代理商： | ST7036 |
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ST7036
I
2
C Interface protocol
The ST7036 supports command, data write addressed slaves on the bus.
Before any data is transmitted on the I
2
C Interface, the device, which should respond, is addressed first. Four 7-bit slave
addresses (01111
00
to 01111
11
) are reserved for the ST7036. The R/W is assigned to 0 for Write only.
The I
2
C Interface protocol is illustrated in Fig.5.
The sequence is initiated with a START condition (S) from the I
2
C Interface master, which is followed by the slave address.
All slaves with the corresponding address acknowledge in parallel, all the others will ignore the I
2
C Interface transfer. After
acknowledgement, one or more command words follow which define the status of the addressed slaves.
A command word consists of a control byte, which defines Co and RS, plus a data byte.
The last control byte is tagged with a cleared most significant bit (i.e. the continuation bit Co). After a control byte with a
cleared Co bit, only data bytes will follow. The state of the RS bit defines whether the data byte is interpreted as a command
or as RAM data. All addressed slaves on the bus also acknowledge the control and data bytes. After the last control byte,
depending on the RS bit setting; either a series of display data bytes or command data bytes may follow. If the RS bit is set
to logic 1, these display bytes are stored in the display RAM at the address specified by the data pointer. The data pointer is
automatically updated and the data is directed to the intended ST7036i device. If the RS bit of the last control byte is set to
logic 0, these command bytes will be decoded and the setting of the device will be changed according to the received
commands. Only the addressed slave makes the acknowledgement after each byte. At the end of the transmission the I
2
C
INTERFACE-bus master issues a STOP condition (P).
V1.1
2003/12/24
16/72
1
2
8
9
S
DATA OUTPUT
BY TRANSMITTER
DATA OUTPUT
BY RECEIVER
SCL FROM
MASTER
START
condition
Fig .4 Acknowledgement on the IIC Interface
not acknowledge
acknowledge
clock pulse for
acknowledgement
相關(guān)PDF資料 |
PDF描述 |
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| ST7036-0A | Dot Matrix LCD Controller/Driver |
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| ST7920-0A | ST7920 |
| ST7920-0B | ST7920 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST7036-0A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Dot Matrix LCD Controller/Driver |
| ST7038 | 制造商:SITRONIX 制造商全稱:SITRONIX 功能描述:Dot Matrix LCD Controller/Driver |
| ST704 | 制造商:POLYFET 制造商全稱:Polyfet RF Devices 功能描述:SILICON GATE ENHANCEMENT MODE RF POWER VDMOSTRANSISTOR |
| ST7047 | 制造商:Pulse 功能描述:- Bulk |
| ST7047-001 | 制造商:Pulse 功能描述:- Bulk |
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