
ST7036
Pin Function
Name
V1.1
2003/12/24
11/72
Number
I/O Interfaced with
Function
XRESET
1
I
MPU
External reset pin. Only if the power on reset be used, the
XRESET pin could be fixed to VDD.
Low active.
Select registers.
0: Instruction register (for write)
Busy flag & address counter (for read)
1: Data register (for write and read)
RS
1
I
MPU
R/W
1
I
MPU
Select read or write(In parallel mode).
0: Write
1: Read
E
1
I
MPU
Starts data read/write. (“E” must connect to “VDD” when
serial mode is selected.)
CSB
1
I
MPU
Chip select in parallel mode and serial interface(Low
active). When the CSB in falling edge state ( in serial
interface ), the shift register and the counter are reset.
DB0~DB3 are four low order bi-directional data bus pins.
DB0~DB3 are used for data transfer and receive between
the MPU and the ST7036.
These pins are not used during 4-bit operation and must
connect to VDD.
DB4~DB7 are four high order bi-directional data bus pins.
DB4~DB7 are used for data transfer and receive between
the MPU and the ST7036. DB7 can be used as a busy flag.
In serial interface mode DB7 is SI(input data),DB6 is
SCL(serial clock).
In I
2
C interface DB7 is slave address A1, DB6 is slave
address A0, DB5 DB4 DB3 are SDA –out, DB2 DB1 are
SDA-in and D0 is SCL.
SDA and SCL must connect to I
2
C bus ( I
2
C bus means that
connecting a resister between SDA/SCL and the power of
I
2
C bus ).
DB0 to DB7
8
I/O
MPU
Ext
1
I
ITO option
Extension instruction select:
0:enable extension instruction(add contrast/ICON/double
height font/ extension instruction)
1:disable extension instruction(compatible to ST7066U, but
without 5x11dot font)
PSB
1
I
MPU
Interface selection
0:serial mode
(“E” must connect to “VDD” when serial mode is selected.)
1:parallel mode(4/8 bit)
In I
2
C interface PSB must connect to VDD
PSI2B
1
I
ITO option
PSB
0
0
1
1
PSI2B
0
1
0
1
Interface
No use
SI4
SI2 ( I
2
C )
Parallel 68