參數(shù)資料
型號(hào)： ST16C452CJ68TR-F
廠商： Exar Corporation
文件頁數(shù)： 7/30頁
文件大?。?/td> 0K
描述： IC UART W/PAR PORT DUAL 68PLCC
標(biāo)準(zhǔn)包裝： 250
特點(diǎn)： *
通道數(shù)： 2，DUART
FIFO's： 1 字節(jié)
規(guī)程： 打印機(jī)
電源電壓： 2.97 V ~ 5.5 V
帶并行端口： 是
帶故障啟動(dòng)位檢測(cè)功能： 是
帶調(diào)制解調(diào)器控制功能： 是
帶CMOS： 是
安裝類型： 表面貼裝
封裝/外殼： 68-LCC（J 形引線）
供應(yīng)商設(shè)備封裝： 68-PLCC
包裝： 帶卷 (TR)
15
ST16C452/452PS
Rev. 3.20
IER BIT-3:
Logic 0 = Disable the modem status register interrupt.
(normal default condition)
Logic 1 = Enable the modem status register interrupt.
IER BIT 4-7:
Not Used - initialized to a logic 0.
Interrupt Status Register (ISR)
The 452/452PS provides four levels of prioritized
interrupts to minimize external software interaction.
The Interrupt Status Register (ISR) provides the user
with four interrupt status bits. Performing a read cycle
on the ISR will provide the user with the highest
pending interrupt level to be serviced. No other inter-
rupts are acknowledged until the pending interrupt is
serviced. Whenever the interrupt status register is
read, the interrupt status is cleared. However it should
be noted that only the current pending interrupt is
cleared by the read. A lower level interrupt may be
seen after rereading the interrupt status bits. The
Interrupt Source Table 8 (below) shows the data
values (bits 0-3) for the four prioritized interrupt levels
and the interrupt sources associated with each of
these interrupt levels:
Interrupt Enable Register (IER)
The Interrupt Enable Register (IER) masks the inter-
rupts from receiver ready, transmitter empty, line
status and modem status registers. These interrupts
would normally be seen on the INT A,B output pins.
IER BIT-0:
This interrupt will be issued when the RHR is full or is
cleared when the RHR is empty.
Logic 0 = Disable the receiver ready interrupt. (normal
default condition)
Logic 1 = Enable the receiver ready interrupt.
IER BIT-1:
This interrupt will be issued whenever the THR is
empty and is associated with bit-1 in the LSR register.
Logic 0 = Disable the transmitter empty interrupt.
(normal default condition)
Logic 1 = Enable the transmitter empty interrupt.
IER BIT-2:
This interrupt will be issued whenever a fully as-
sembled receive character is transferred from the
RSR to the RHR, i.e., data ready, LSR bit-0.
Logic 0 = Disable the receiver line status interrupt.
(normal default condition)
Logic 1 = Enable the receiver line status interrupt.
Table 8, INTERRUPT SOURCE TABLE
Priority
[ISR BITS]
Level
Bit-3 Bit-2 Bit-1 Bit-0
Source of the interrupt
1
0110
LSR (Receiver Line Status Register)
2
0100
RXRDY (Received Data Ready)
3
0010
TXRDY (Transmitter Holding Register Empty)
4
0000
MSR (Modem Status Register)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ST16C452IJ68 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述:
ST16C452IJ68-F 功能描述:UART 接口集成電路 DUAL UART W/PARALEL PRINTER PORT RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
ST16C452IJ68PS 制造商:EXAR 制造商全稱:EXAR 功能描述:DUAL UART WITH PARALLEL PRINTER PORT
ST16C452IJ68PS-F 功能描述:UART 接口集成電路 DUAL UART W/PARALEL PRINTER PORT RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
ST16C452IJ68TR-F 制造商:Exar Corporation 功能描述:UART 2-CH 3.3V/5V 68-Pin PLCC T/R 制造商:Exar Corporation 功能描述:ST16C452IJ68TR-F
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