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參數(shù)資料
| 型號： | SSTUA32864EC |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | Linear Voltage Regulator IC; Package/Case:8-MSOP; Current Rating:250mA; Leaded Process Compatible:No; Output Voltage Max:2.5V; Peak Reflow Compatible (260 C):No; Reel Quantity:2500; Voltage Regulator Type:Low Dropout (LDO) |
| 中文描述： | SSTU SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA96 |
| 封裝： | 13.50 X 5.50 MM, 1.05 MM HEIGHT, PLASTIC, SOT-536-1, LFBGA-96 |
| 文件頁數(shù)： | 8/19頁 |
| 文件大?。?/td> | 112K |
| 代理商： | SSTUA32864EC |
9397 750 14757
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 12 May 2005
8 of 19
Philips Semiconductors
SSTUA32864
1.8 V configurable registered buffer for DDR2-667 RDIMM applications
8.
Limiting values
[1]
The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
[2]
This value is limited to 2.5 V maximum.
9.
Recommended operating conditions
[1]
The RESET and Cn inputs of the device must be held at valid logic levels (not floating) to ensure proper device operation.
[2]
The differential inputs must not be floating, unless RESET is LOW.
Table 4:
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
V
DD
supply voltage
V
I
receiver input voltage
V
O
driver output voltage
I
IK
input clamp current
I
OK
output clamp current
I
O
continuous output current
I
CCC
continuous current through each
V
DD
or GND pin
T
stg
storage temperature
Limiting values
Conditions
Min
0.5
0.5
[1]
0.5
[1]
-
-
-
-
Max
+2.5
+2.5
[2]
V
DD
+ 0.5
[2]
±
50
±
50
±
50
±
100
Unit
V
V
V
mA
mA
mA
mA
V
I
< 0 V or V
I
> V
DD
V
O
< 0 V or V
O
> V
DD
0 V < V
O
< V
DD
65
+150
°
C
Table 5:
Symbol
V
DD
V
ref
V
TT
V
I
V
IH(AC)
V
IL(AC)
V
IH(DC)
V
IL(DC)
V
IH
V
IL
V
ICR
Operating conditions
Parameter
supply voltage
reference voltage
termination voltage
input voltage
AC HIGH-level input voltage
AC LOW-level input voltage
DC HIGH-level input voltage
DC LOW-level input voltage
HIGH-level input voltage
LOW-level input voltage
common mode input voltage
range
differential input voltage
HIGH-level output current
LOW-level output current
ambient temperature
Conditions
Min
1.7
0.49
×
V
DD
V
ref
0.040
0
V
ref
+ 0.250
-
V
ref
+ 0.125
-
Typ
-
0.50
×
V
DD
V
ref
-
-
-
-
-
-
-
-
Max
2.0
0.51
×
V
DD
V
ref
+ 0.040
V
DD
-
V
ref
0.250
-
V
ref
0.125
V
DD
0.35
×
V
DD
1.125
Unit
V
V
V
V
V
V
V
V
V
V
V
data inputs (Dn), CSR
data inputs (Dn), CSR
data inputs (Dn), CSR
data inputs (Dn), CSR
RESET, Cn
RESET, Cn
CK, CK
[1]
0.65
×
V
DD
[1]
-
[2]
0.675
V
ID
I
OH
I
OL
T
amb
CK, CK
[2]
600
-
-
0
-
-
-
-
-
8
8
+70
mV
mA
mA
°
C
operating in free air
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| SSTUA32864EC,518 | 功能描述:寄存器 1.8V CONFG REG BUFFER/DDR2-667 RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時鐘頻率:36 MHz 傳播延遲時間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
| SSTUA32864EC,551 | 功能描述:寄存器 1.8V CONFG REG BUFFER/DDR2-667 RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時鐘頻率:36 MHz 傳播延遲時間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
| SSTUA32864EC,557 | 功能描述:寄存器 1.8V CONFG REG BUFFER/DDR2-667 RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時鐘頻率:36 MHz 傳播延遲時間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
| SSTUA32864EC/G | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1.8 V configurable registered buffer for DDR2-667 RDIMM applications |
| SSTUA32864EC/G,518 | 功能描述:寄存器 1.8V CONFG REG RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時鐘頻率:36 MHz 傳播延遲時間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
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