參數(shù)資料
型號： SST89V54RD2-33-I-TQJ
廠商： SILICON STORAGE TECHNOLOGY INC
元件分類： 微控制器/微處理器
英文描述： FlashFlex51 MCU
中文描述： 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PQFP44
封裝： MS-026ACB, TQFP-44
文件頁數(shù)： 43/91頁
文件大小： 984K
代理商： SST89V54RD2-33-I-TQJ
Preliminary Specifications
FlashFlex51 MCU
SST89E52RD2 / SST89E54RD2 / SST89E58RD2 / SST89E516RD2
SST89V52RD2 / SST89V54RD2 / SST89V58RD2 / SST89V516RD2
43
2004 Silicon Storage Technology, Inc.
S71255-00-000
3/04
Note:
DISIAPL pin in PLCC or TQFP will also disable IAP commands if it is externally pulled low when reset.
Note:
DISIAPL pin in PLCC or TQFP will also disable IAP commands if it is externally pulled low when reset.
TABLE
4-6: IAP C
OMMANDS
1
FOR
SST89E/V516RD2
Operation
Chip-Erase
3
Block-Erase
5
Sector-Erase
5
Byte-Program
5
Byte-Verify (Read)
5
Prog-SB1
9
Prog-SB2
9
Prog-SB3
9
Prog-SC0
9
Enable-Clock-Double
9
SFCM [6:0]
2
01H
0DH
0BH
0EH
0CH
0FH
03H
05H
09H
08H
SFDT [7:0]
55H
55H
X
DI
8
DO
8
AAH
AAH
AAH
AAH
AAH
SFAH [7:0]
X
4
AH
AH
6
AH
AH
X
X
X
5AH
55H
SFAL [7:0]
X
X
AL
7
AL
AL
X
X
X
X
X
T4-6.0 1255
1. SFCF[6]=1 enables IAP commands; SFCF[6]=0 disables IAP commands.
2. Interrupt/Polling enable for flash operation completion
SFCM[7] =1: Interrupt enable for flash operation completion
0: polling enable for flash operation completion
3. Chip-Erase only functions in IAP mode when EA#=0 (external memory execution) and device is not in level 4 locking.
4. X can be V
IL
or V
IH
, but no other value.
5. Refer to Table 4-5 for address resolution
6. AH = Address high order byte
7. AL = Address low order byte
8. DI = Data Input, DO = Data Output, all other values are in hex.
9. Instruction must be located in Block 1 or external code memory.
TABLE
4-7: IAP C
OMMANDS
1
FOR
SST89E/V5
X
RD2
1. SFCF[6]=1 enables IAP commands; SFCF[6]=0 disables IAP commands.
2. Interrupt/Polling enable for flash operation completion
SFCM[7] =1: Interrupt enable for flash operation completion
0: polling enable for flash operation completion
3. Chip-Erase only functions in IAP mode when EA#=0 (external memory execution) and device is not in level 4 locking.
4. X can be V
IL
or V
IH
, but no other value.
5. AH = Address high order byte
6. AL = Address low order byte
7. DI = Data Input, DO = Data Output, all other values are in hex.
8. SFAH[7:5] = 111b selects Block 1, SFAH[7] = 0b selects Block 0
9. Instruction must be located in Block 1 or external code memory.
Operation
Chip-Erase
3
Block-Erase
Sector-Erase
Byte-Program
Byte-Verify (Read)
8
Prog-SB1
9
Prog-SB2
9
Prog-SB3
9
Prog-SC0
9
Prog-SC1
9
Enable-Clock-Double
9
SFCM [6:0]
2
01H
0DH
0BH
0EH
0CH
0FH
03H
05H
09H
09H
08H
SFDT [7:0]
55H
55H
X
DI
7
DO
7
AAH
AAH
AAH
AAH
AAH
AAH
SFAH [7:0]
X
4
AH
5
AH
AH
AH
X
X
X
5AH
AAH
55H
SFAL [7:0]
X
X
AL
6
AL
AL
X
X
X
X
X
X
T4-7.0 1255
相關(guān)PDF資料
PDF描述
SST89V54RD2-40-C-NI FlashFlex51 MCU
SST89V54RD2-40-C-NJ FlashFlex51 MCU
SST89V54RD2-40-C-PI FlashFlex51 MCU
SST89V54RD2-40-C-PJ FlashFlex51 MCU
SST89V54RD2-40-C-TQI FlashFlex51 MCU
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SST89V54RD2-33-I-TQJE 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:FlashFlex51 MCU
SST89V54RD2-33-I-TQJE1 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:FlashFlex51 MCU
SST89V54RD2-33-I-TQJF2 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:FlashFlex51 MCU
SST89V54RD2-40-C-NI 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:FlashFlex51 MCU
SST89V54RD2-40-C-NIE1 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:FlashFlex51 MCU
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