參數(shù)資料
型號(hào)： SST89E54RC-33-C-PIE
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PDIP40
封裝： ROHS COMPLIANT, PLASTIC, MS-011AC, DIP-40
文件頁(yè)數(shù)： 20/57頁(yè)
文件大?。?/td> 652K
代理商： SST89E54RC-33-C-PIE
Data Sheet
FlashFlex MCU
SST89E52RC / SST89E54RC
27
2007 Silicon Storage Technology, Inc.
S71259-04-000
1/07
4.0 FLASH MEMORY PROGRAMMING
The device internal flash memory can be programmed or
erased using In-Application Programming (IAP).
4.1 Product Identification
The Read-ID command accesses the Signature Bytes that
identify the device and the manufacturer as SST. External
programmers primarily use these Signature Bytes in the
selection of programming algorithms.
4.2 In-Application Programming
The device offers 17/9 KByte of in-application programma-
ble flash memory. During In-Application Programming
(IAP), the CPU of the microcontroller enters STOP mode.
Upon completion of IAP, the CPU will be released to
resume program execution. The mailbox registers (SFST,
SFCM, SFAL, SFAH, SFDT and SFCF) located in the spe-
cial function register (SFR), control and monitor the
device’s Erase and Program processes.
Table 4-3 outlines the commands and their associated
mailbox register settings.
4.2.1 IAP Mode Clock Source
During IAP mode, both the CPU core and the flash control-
ler unit are driven off the external clock. However, an inter-
nal oscillator will provide timing references for Program and
Erase operations. The internal oscillator is only turned on
when required, and is turned off as soon as the flash oper-
ation is completed.
4.2.2 IAP Enable Bit
The IAP enable bit, SFCF[6], enables In-Application pro-
gramming mode. Until this bit is set, all flash programming
IAP commands will be ignored.
4.2.3 IAP Mode Commands
In order to protect the flash memory against inadvertent
writes during unstable power conditions, all IAP commands
need the following feed sequence to validate the execution
of commands.
Feed Sequence
1. Write A2H to SFIS0 (097H)
2. Write DFH to SFIS1 (0C4H)
3. Then write IAP command to SFCM (0B2H)
Note: Above commands should be executed in
sequence without interference from other
instructions.
All of the following commands can only be initiated in the
IAP mode. In all situations, writing the control byte to the
SFCM register will initiate all of the operations. A feed
sequence is required prior to issuing commands through
SFCM. Without the feed sequence all IAP commands are
ignored. Sector-Erase, Byte-Program, and Byte-Verify
commands will not be carried out on a specific memory
page if the security locks are enabled on the memory page.
The Byte-Program command is to update a byte of flash
memory. If the original flash byte is not FFH, it should first
be erased with an appropriate Erase command. Warning:
Do not attempt to write (Program or Erase) to a sector
that the code is currently fetching from. This will cause
unpredictable program behavior and may corrupt pro-
gram data.
TABLE
4-1: Product Identification
Address
Data
Manufacturer’s ID
30H
BFH
Device ID
31H
F7H
Device ID (extended)
SST89E54RC
32H
43H
SST89E52RC
32H
42H
T4-1.1 1259
相關(guān)PDF資料
PDF描述
SST89E54RC-33-C-NJE 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PQCC44
SST89E52RC-33-C-NJE 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PQCC44
SST89E52RC-33-C-PIE 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PDIP40
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相關(guān)代理商/技術(shù)參數(shù)
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SST89E54RD 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:FlashFlex MCU
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