參數(shù)資料
型號(hào)： SST65P542R-8-C-SG
廠商： SILICON STORAGE TECHNOLOGY INC
元件分類(lèi)： 微控制器/微處理器
英文描述： Remote Controller MCU
中文描述： 8-BIT, FLASH, 4 MHz, MICROCONTROLLER, PDSO28
封裝： MS-013AE, SOIC-28
文件頁(yè)數(shù)： 19/40頁(yè)
文件大?。?/td> 538K
代理商： SST65P542R-8-C-SG
Advance Information
Remote Controller MCU
SST65P542R
19
2001 Silicon Storage Technology, Inc.
S71170-03-000
12/01 368
3.2 SRAM
There are 352 Bytes of SRAM available. The SRAM
addresses start from location 0020H to 017FH. The stack
pointer can address 64 Bytes of stack beginning at address
location 00FFH and ending at 00C0H.
3.3 SuperFlash Memory
The SST65P542R has 16 KByte of SuperFlash EEPROM
memory. The memory is organized as 128 sectors of 128
Bytes each. The minimum erasable memory unit is one
sector or 128 Bytes. The user programmable flash memory
occupies the address space from C000H to FF7FH. The
user vector area consists of 128 Bytes starting from
address location FF80H to FFFFH. Address FF80H is for
flash memory read protection. There are five predeter-
mined user vectors from FFF6H through FFFFH dedicated
to the reset and interrupts. Every vector consists of two
bytes to be loaded into program counter for jumping to an
interrupt service routine (ISR). See Table 3-5 for detailed
descriptions of these vectors.
TABLE
3-5: I
NTERRUPT
/R
ESET
S
ECTOR
Address
Location
FF80H
FF81H-FFF5H
FFF6H
FFF7H
FFF8H
FFF9H
FFFAH
FFFBH
FFFCH
FFFDH
FFFEH
FFFFH
User Vectors
Flash Memory Read Protection
Unused
Core Timer Vector - (High Byte)
Core Timer Vector - (Low Byte)
CMT Vector (High Byte)
CMT Vector (Low Byte)
IRQ/Port B Vector (High Byte)
IRQ/Port B Vector (Low Byte)
SWI Vector (High Byte)
SWI Vector (Low Byte)
Reset Vector (High Byte)
Reset Vector (Low Byte)
T3-5.5 368
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