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參數(shù)資料
| 型號： | SST49LF004B-33-4C-NHE |
| 廠商： | SILICON STORAGE TECHNOLOGY INC |
| 元件分類： | PROM |
| 英文描述： | 4 Mbit LPC Firmware Flash |
| 中文描述： | 512K X 8 FLASH 3V PROM, 11 ns, PQCC32 |
| 封裝： | ROHS COMPLIANT, PLASTIC, MS-016AE, LCC-32 |
| 文件頁數(shù)： | 15/39頁 |
| 文件大?。?/td> | 460K |
| 代理商： | SST49LF004B-33-4C-NHE |
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Data Sheet
4 Mbit LPC Firmware Flash
SST49LF004B
15
2003 Silicon Storage Technology, Inc.
S71232-02-000
12/03
LPC Memory Write Cycle
FIGURE 7: LPC M
EMORY
W
RITE
C
YCLE
W
AVEFORM
TABLE
7: LPC M
EMORY
W
RITE
C
YCLE
F
IELD
D
EFINITIONS
Clock
Cycle
1
Field
Name
START
Field Contents
LAD[3:0]
1
0000
1. Field contents are valid on the rising edge of the present clock cycle.
LAD[3:0]
Direction
IN
Comments
LFRAME# must be active (low) for the device to
respond. Only the last field latched before LFRAME#
transitions high will be recognized. The START field
contents (0000b) indicate an LPC Memory cycle.
Indicates the type of LPC Memory cycle. Bits 3:2
must be “01b” for memory cycle. Bit 1 indicates the
type of transfer “1” for Write. Bit 0 is reserved.
Address Phase for Memory Cycle. LPC protocol sup-
ports a 32-bit address phase. YYYY is one nibble of
the entire address. Addresses are transferred most
significant nibble first.
ZZZZ is the least-significant nibble of the data byte.
ZZZZ is the most-significant nibble of the data byte.
In this clock cycle, the host drives the bus to all '1's and
then floats the bus. This is the first part of the bus “turn-
around cycle.”
The SST49LF004B takes control of the bus during this
cycle.
The SST49LF004B outputs the values 0000, indicating
that it has received data or a flash command.
In this clock cycle, the SST49LF004B drives the bus to
all '1's and then floats the bus. This is the first part of
the bus “turnaround cycle.”
Host resumes control of the bus during this cycle.
2
CYCTYPE +
DIR
011X
IN
3-10
ADDR
YYYY
IN
11
12
13
DATA
DATA
TAR0
ZZZZ
ZZZZ
1111
IN
IN
IN
14
TAR1
1111 (float)
Float then OUT
15
SYNC
0000
OUT
16
TAR0
1111
OUT then Float
17
TAR1
1111 (float)
Float then IN
T7.0 1232
1232 F06.1
LFRAME#
LAD[3:0]
0000b
011Xb
A[23:20]
A[19:16]
A[3:0]
A[7:4]
A[11:8]
A[15:12]
1111b
Tri-State
2 Clocks
TAR0
Load Address in 8 Clocks
Address
1 Clock
1 Clock
Start
CY+
DIR
TAR
1 Clock
Sync
Data
Load Data in 2 Clocks
0000b
D[7:4]
D[3:0]
LCLK
A[31:28] A[27:24]
Data
TAR1
相關PDF資料 |
PDF描述 |
|---|---|
| SST49LF040 | 4 Mbit LPC Flash |
| SST49LF020 | 2 Megabit LPC Flash |
| SST49LF020-33-4C-NH | 2 Megabit LPC Flash |
| SST49LF020-33-4C-WH | 2 Megabit LPC Flash |
| SST49LF040-33-4C-NH | 4 Mbit LPC Flash |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SST49LF004B334CNHT | 制造商:SST 功能描述:NEW |
| SST49LF004B-33-4C-WHE | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:4 Mbit Firmware Hub |
| SST49LF004C | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:4 Mbit / 8 Mbit LPC Serial Flash |
| SST49LF004C-33-4C-NHE | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:4 Mbit / 8 Mbit LPC Serial Flash |
| SST49LF004C-33-4C-WHE | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:4 Mbit / 8 Mbit LPC Serial Flash |
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