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參數(shù)資料
| 型號： | SST34HF1601-70-4C-L1P |
| 廠商： | Silicon Storage Technology, Inc. |
| 元件分類： | 組合存儲器 |
| 英文描述： | 16 Mbit Concurrent SuperFlash + 8 Mbit SRAM ComboMemory |
| 中文描述： | 16兆位的SuperFlash 8兆位并行SRAM的ComboMemory |
| 文件頁數(shù)： | 5/30頁 |
| 文件大小： | 472K |
| 代理商： | SST34HF1601-70-4C-L1P |
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Advance Specifications
16 Mbit Concurrent SuperFlash + 8 Mbit SRAM ComboMemory
SST34HF1681
5
2001 Silicon Storage Technology, Inc.
S71214-00-000
12/01 561
Product Identification Mode Exit/
CFI Mode Exit
In order to return to the standard Read mode, the Software
Product Identification mode must be exited. Exit is accom-
plished by issuing the Software ID Exit command
sequence, which returns the device to the Read mode.
This command may also be used to reset the device to the
Read mode after any inadvertent transient condition that
apparently causes the device to behave abnormally, e.g.,
not read correctly. Please note that the Software ID Exit/
CFI Exit command is ignored during an internal Program or
Erase operation. See Table 4 for software command
codes, Figure 16 for timing waveform and Figure 23 for a
flowchart.
SRAM Operation
With BES1# low, BES2 and BEF# high, the
SST34HF1681 operates as 512K x16 CMOS SRAM,
with fully static operation requiring no external clocks or
timing strobes. The SST34HF1681 SRAM is mapped
into the first 512 KWord address space. When BES1#,
BEF# are high and BES2 is low, all memory banks are
deselected and the device enters standby. Read and
Write cycle times are equal. The control signals UBS#
and LBS# provide access to the upper data byte and
lower data byte. See Table 3 for SRAM Read and Write
data byte control modes of operation.
SRAM Read
The SRAM Read operation of the SST34HF1681 is con-
trolled by OE# and BES1#, both have to be low with WE#
and BES2 high for the system to obtain data from the out-
puts. BES1# and BES2 are used for SRAM bank selection.
OE# is the output control and is used to gate data from the
output pins. The data bus is in high impedance state when
OE# is high. Refer to the Read cycle timing diagram, Fig-
ure 3, for further details.
SRAM Write
The SRAM Write operation of the SST34HF1681 is con-
trolled by WE# and BES1#, both have to be low, BES2
have to be high for the system to write to the SRAM. During
the Word-Write operation, the addresses and data are ref-
erenced to the rising edge of either BES1#, WE#, or the
falling edge of BES2 whichever occurs first. The write time
is measured from the last falling edge of BES#1 or WE# or
the rising edge of BES2 to the first rising edge of BES1#, or
WE# or the falling edge of BES2. Refer to the Write cycle
timing diagram, Figures 4 and 5, for further details.
561 ILL B1.2
SuperFlash Memory
(Bank 1)
I/O Buffers
SuperFlash Memory
(Bank 2)
8 Mbit
SRAM
A
MS
- A
0
DQ
15
- DQ
0
A
MS
= Most significant address
Control
Logic
RST#
BEF#
WP#
LBS#
UBS#
OE#
BES1#
BES2
RY/BY#
Address
Buffers
Address
Buffers
F
UNCTIONAL
B
LOCK
D
IAGRAM
相關(guān)PDF資料 |
PDF描述 |
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| SST34HF1601-90-4C-L1P | 16 Mbit Concurrent SuperFlash + 8 Mbit SRAM ComboMemory |
| SST34HF1602D-70-4C-B1PE | 16 Mbit Concurrent SuperFlash + 2/4/8 Mbit SRAM ComboMemory |
| SST34HF1602C | 16 Mbit Concurrent SuperFlash + 2/4/8 Mbit SRAM ComboMemory |
| SST34HF1602D-70-4C-B1SE | 16 Mbit Concurrent SuperFlash + 2/4/8 Mbit SRAM ComboMemory |
| SST34HF1602D-70-4C-L1PE | 16 Mbit Concurrent SuperFlash + 2/4/8 Mbit SRAM ComboMemory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SST34HF1601-70-4C-LFP | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:16 Mbit Concurrent SuperFlash + 2 / 4 Mbit SRAM ComboMemory |
| SST34HF1601-70-4E-L1P | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:16 Mbit Concurrent SuperFlash + 8 Mbit SRAM ComboMemory |
| SST34HF1601-70-4E-LFP | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:16 Mbit Concurrent SuperFlash + 2 / 4 Mbit SRAM ComboMemory |
| SST34HF1601-90-4C-L1P | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:16 Mbit Concurrent SuperFlash + 2 / 4 Mbit SRAM ComboMemory |
| SST34HF1601-90-4C-LFP | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:16 Mbit Concurrent SuperFlash + 2 / 4 Mbit SRAM ComboMemory |
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