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參數(shù)資料
| 型號(hào)： | SSM3K15FV_07 |
| 廠商： | Toshiba Corporation |
| 英文描述： | High Speed Switching Applications |
| 中文描述： | 高速開關(guān)應(yīng)用 |
| 文件頁(yè)數(shù)： | 1/5頁(yè) |
| 文件大?。?/td> | 132K |
| 代理商： | SSM3K15FV_07 |
SSM3K15FV
2007-11-01
1
TOSHIBA Field Effect Transistor Silicon N Channel MOS Type
SSM3K15FV
High Speed Switching Applications
Analog Switch Applications
Optimum for high-density mounting in small packages
Low on-resistance
: R
on
= 4.0
(max) (@V
GS
= 4 V)
: R
on
= 7.0
(max) (@V
GS
= 2.5 V)
Absolute Maximum Ratings
(Ta
=
25°C)
Characteristics
Symbol
Rating
Unit
Drain-source voltage
V
DS
V
GSS
I
D
I
DP
P
D
(Note 1)
T
ch
T
stg
30
V
Gate-source voltage
±
20
V
DC
100
Drain current
Pulse
200
mA
Drain power dissipation (Ta
=
25
°
C)
150
mW
Channel temperature
150
°
C
°
C
Storage temperature
55~150
Note:
Using continuously under heavy loads (e.g. the application of
high temperature/current/voltage and the significant change in
temperature, etc.) may cause this product to decrease in the
reliability significantly even if the operating conditions (i.e.
operating temperature/current/voltage, etc.) are within the
absolute maximum ratings.
Please design the appropriate reliability upon reviewing the
Toshiba Semiconductor Reliability Handbook (“Handling
Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and
estimated failure rate, etc).
Note 1: Total rating, mounted on FR4 board (25.4 mm
×
25.4 mm
×
1.6 t)
Marking
Equivalent Circuit
Handling Precaution
When handling individual devices (which are not yet mounted on a circuit board), be sure that the environment is
protected against electrostatic electricity. Operators should wear anti-static clothing, and containers and other objects
that come into direct contact with devices should be made of anti-static materials.
Unit: mm
JEDEC
-
JEITA
-
TOSHIBA
2-1L1B
Weight: 0.0015 g (typ.)
1. Gate
2. Source
3. Drain
VESM
1
0
1
2
3
0
0
0
0.8±0.05
0
1.2±0.05
0
0
0.5mm
0.45mm
0.45mm
0.4mm
D P
1
2
3
1
2
3
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