參數(shù)資料
型號(hào)： SN75FC1000BPHD
廠商： Texas Instruments, Inc.
英文描述： Toggle Switch; Circuitry:DPDT; Switch Operation:On-On; Contact Current Max:12A; Actuator Style:Bat; Switch Terminals:Screw; Leaded Process Compatible:Yes RoHS Compliant: Yes
中文描述： 1千兆位光纖通道收發(fā)器
文件頁(yè)數(shù)： 7/19頁(yè)
文件大小： 256K
代理商： SN75FC1000BPHD
SN75FC1000B
1-GIGABIT FIBRE CHANNEL TRANSCEIVER
SLLS371 – FEBRUARY 2000
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
data reception (continued)
During a bus error condition or word alignment, the receive byte clocks RBC0 and RBC1 are stretched (never
truncated), ensuring that their frequency never exceeds 60 MHz. When the incoming serial data does not meet
its frequency requirements, then the receive byte clock frequency is maintained and never exceeds 60 MHz.
receive PLL operation
The receive PLL provides automatic locking to the incoming data. At power up, the maximum initial lock time
is 500
μ
s. The PLL can also be initiated or set to phase lock to the externally supplied reference clock by enabling
lock-to-reference (LCKREFN). The lock-to-reference causes the receive PLL to lock to 10
×
the reference clock
(REFCLK) input providing a PLL preset and reset capability.
If during normal operation a transient occurs, which is defined as any arbitrary phase shift in the incoming data
and/or a frequency wander of up to 200 ppm, then the PLL recovers lock within 2.4
μ
s (2500 serial bit times).
Any condition exceeding these values is considered a power-up scenario and the PLL recovers lock within
500
μ
s.
receiver word alignment
The SN75FC1000B uses a 10-bit K28.5 character (comma character) word alignment scheme. The following
sections explain how this scheme works and how it realigns itself.
comma character on expected boundary
The SN75FC1000B provides 10-bit K28.5 character recognition and word alignment. The 10-bit word alignment
is enabled by forcing SYCNEN high. This enables the function that examines and compares ten bits of serial
input data to the K28.5 synchronization character. The K28.5 character is defined in the fibre channel standard
as a pattern consisting of 0011111010 (a negative number beginning disparity) with the 7 MSBs (0011111)
referred to as the comma character. The K28.5 character was implemented specifically for aligning fibre
channel data words. As long as the K28.5 character falls within the expected 10-bit word boundary, the received
10-bit data is properly aligned and data realignment is not required. Figure 1 shows the timing characteristics
of RBC0, RBC1, SYNC and RD0 – RD9 while synchronized.
NOTE:
The
K28.5 character is valid on the rising edge of RBC1.
RBC0
RD0 – RD9
RBC1
SYNC
K28.5
Dxx.x
Dxx.x
Dxx.x
K28.5
Dxx.x
Figure 1. Synchronous Timing Characteristics Waveforms
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SN75HVD05DG4 功能描述:總線收發(fā)器 RS485 High Out RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
SN75HVD05DR 功能描述:總線收發(fā)器 High-Output RS-485 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
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