參數(shù)資料
型號: SN74LVTH182514DGG
廠商: Texas Instruments, Inc.
英文描述: 3.3-V ABT SCAN TEST DEVICES WITH 20-BIT UNIVERSAL BUS TRANSCEIVERS
中文描述: 的3.3V ABT生根粉掃描測試設(shè)備與20位通用總線收發(fā)器
文件頁數(shù): 29/34頁
文件大?。?/td> 548K
代理商: SN74LVTH182514DGG
SN54LVTH18514, SN54LVTH182514, SN74LVTH18514, SN74LVTH182514
3.3-V ABT SCAN TEST DEVICES
WITH 20-BIT UNIVERSAL BUS TRANSCEIVERS
SCBS670C – AUGUST 1996 – REVISED MARCH 1998
29
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions (see Note 4)
SN54LVTH182514
MIN
SN74LVTH182514
MIN
UNIT
MAX
MAX
VCC
VIH
VIL
VI
Supply voltage
2.7
3.6
2.7
3.6
V
High-level input voltage
2
2
V
Low-level input voltage
0.8
0.8
V
Input voltage
5.5
5.5
V
IOH
High level output current
High-level output current
A port, TDO
–24
–32
mA
B port
–12
–12
IOL
Low level output current
Low-level output current
A port, TDO
24
32
mA
B port
12
12
IOL
t/
v
TA
Current duty cycle
50%, f
1 kHz
NOTE 4: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs literature number SCBA004.
Low-level output current
A port, TDO
48
64
mA
Input transition rise or fall rate
Outputs enabled
10
10
ns/V
°
C
Operating free-air temperature
–55
125
–40
85
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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SN74LVTH18514DGG 3.3-V ABT SCAN TEST DEVICES WITH 20-BIT UNIVERSAL BUS TRANSCEIVERS
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SN74LVTH18512DGG Ceramic Chip Capacitors / MIL-PRF-55681; Capacitance [nom]: 20pF; Working Voltage (Vdc)[max]: 100V; Capacitance Tolerance: +/-1%; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 1206; Termination: Sn60 Coated; Body Dimensions: 0.125" x 0.062" x 0.051"; Container: Bag; Features: MIL-PRF-55681: R Failure Rate
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