參數(shù)資料
型號(hào): SN74LVT760
廠商: Texas Instruments, Inc.
英文描述: 3.3V ABT Octal Buffers/Drivers With 3-State Outputs(3.3V ABT 八緩沖器/驅(qū)動(dòng)器(集電極開路輸出))
中文描述: 3.3生根粉八路緩沖器/驅(qū)動(dòng)器與3態(tài)輸出電壓(3.3V ABT生根粉八緩沖器/驅(qū)動(dòng)器(集電極開路輸出))
文件頁數(shù): 1/5頁
文件大?。?/td> 108K
代理商: SN74LVT760
SN54LVT760, SN74LVT760
3.3-V ABT OCTAL BUFFERS/DRIVERS
WITH OPEN-COLLECTOR OUTPUTS
SCBS476A – JUNE 1994 – REVISED JULY 1995
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V
Operation and Low-Static Power
Dissipation
Open-Collector Outputs
Support Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 3.3-V V
CC
)
Support Unregulated Battery Operation
Down to 2.7 V
Typical V
OLP
(Output Ground Bounce)
< 0.8 V at V
CC
= 3.3 V, T
A
= 25
°
C
Latch-Up Performance Exceeds 500 mA
Per JEDEC Standard JESD-17
Bus-Hold Data Inputs Eliminate the Need
for External Pullup Resistors
Support Live Insertion
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK), and
Ceramic (J) DIPs
description
These octal buffers and line drivers are designed
specifically for low-voltage (3.3-V) V
CC
operation
but with the capability to provide a TTL interface
to a 5-V system environment.
The ’LVT760 are organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE is low,
the devices pass data from the A inputs to the Y outputs. When OE is high, the outputs are in the high state.
Active bus-hold circuitry is provided on the data bus to hold unused or floating data inputs at a valid logic level.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN74LVT760 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count
and functionality of standard small-outline packages in less than half the printed-circuit-board area.
The SN54LVT760 is characterized for operation over the full military temperature range of –55
°
C to 125
°
C. The
SN74LVT760 is characterized for operation from –40
°
C to 85
°
C.
FUNCTION TABLE
INPUTS
OUTPUT
Y
OE
L
A
L
L
L
H
H
H
X
H
Copyright
1995, Texas Instruments Incorporated
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
V
CC
2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
SN54LVT760 . . . J PACKAGE
SN74LVT760 . . . DB, DW, OR PW PACKAGE
(TOP VIEW)
3
2
1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
1Y1
2A4
1Y2
2A3
1Y3
1A2
2Y3
1A3
2Y2
1A4
2
1
1
1
2
2
2
G
2
V
C
SN54LVT760 . . . FK PACKAGE
(TOP VIEW)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
P
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