參數(shù)資料
型號： SN74ALVC16646
廠商： Texas Instruments, Inc.
英文描述： 16-Bit Bus Transceivers/Registers With 3-State Outputs(16位總線收發(fā)器/寄存器（三態(tài)輸出）)
中文描述： 16位總線收發(fā)器/寄存器與3態(tài)輸出（16位總線收發(fā)器/寄存器（三態(tài)輸出））
文件頁數(shù)： 1/7頁
文件大小： 151K
代理商： SN74ALVC16646
SN74ALVC16646
16-BIT BUS TRANSCEIVER AND REGISTER
WITH 3-STATE OUTPUTS
SCAS265 – JANUARY 1993 – REVISED MARCH 1994
Copyright
1994, Texas Instruments Incorporated
9–1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Member of the Texas Instruments
Widebus
Family
EPIC
(Enhanced-Performance Implanted
CMOS) Submicron Process
Designed to Facilitate Incident-Wave
Switching for Line Impedances of 50
or Greater
Typical V
OLP
(Output Ground Bounce)
< 0.8 V at V
CC
= 3.3 V, T
A
= 25
°
C
Typical V
OHV
(Output V
OH
Undershoot)
> 2 V at V
CC
= 3.3 V, T
A
= 25
°
C
Bus-Hold On Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages
description
This 16-bit bus transceiver and register is
designed for 2.7-V to 3.6-V V
CC
operation.
The SN74ALVC16646 can be used as two 8-bit
transceivers or one 16-bit transceiver. Data on the
A or B bus is clocked into the registers on the
low-to-high transition of the appropriate clock
(CLKAB or CLKBA) input. Figure 1 illustrates the
four fundamental bus-management functions that
can be performed with the SN74ALVC16646.
Output-enable (OE) and direction-control (DIR)
inputs are provided to control the transceiver
functions. In the transceiver mode, data present at
the high-impedance port may be stored in either
register or in both. The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent
mode) data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer
during the transition between stored and real-time data. The direction control (DIR) determines which bus
receives data when OE is low. In the isolation mode (OE high), A data may be stored in one register and/or B
data may be stored in the other register.
When an output function is disabled, the input function is still enabled and may be used to store and transmit
data. Only one of the two buses, A or B, may be driven at a time.
The SN74ALVC16646 is available in TI’s shrink small-outline (DL) and thin shrink small-outline (DGG)
packages, which provide twice the I/O pin count and functionality of standard small-outline packages in the same
printed-circuit-board area.
The SN74ALVC16646 is characterized for operation from –40
°
C to 85
°
C.
DGG OR DL PACKAGE
(TOP VIEW)
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1DIR
1CLKAB
1SAB
GND
1A1
1A2
V
CC
1A3
1A4
1A5
GND
1A6
1A7
1A8
2A1
2A2
2A3
GND
2A4
2A5
2A6
V
CC
2A7
2A8
GND
2SAB
2CLKAB
2DIR
1OE
1CLKBA
1SBA
GND
1B1
1B2
V
CC
1B3
1B4
1B5
GND
1B6
1B7
1B8
2B1
2B2
2B3
GND
2B4
2B5
2B6
V
CC
2B7
2B8
GND
2SBA
2CLKBA
2OE
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
P
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SN74ALVC16721DL 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述:
SN74ALVC16820DL 制造商:Rochester Electronics LLC 功能描述:- Bulk
SN74ALVC16834DGGR 功能描述:通用總線函數(shù) 16bit Univ Bus RoHS:否 制造商:Texas Instruments 邏輯類型:CMOS 邏輯系列:74VMEH 電路數(shù)量:1 開啟電阻（最大值）: 傳播延遲時(shí)間:10.1 ns 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大工作溫度:+ 85 C 最小工作溫度:0 C 封裝 / 箱體:TSSOP-48 封裝:Reel
SN74ALVC16834DGVR 功能描述:通用總線函數(shù) 18bit Univ Bus RoHS:否 制造商:Texas Instruments 邏輯類型:CMOS 邏輯系列:74VMEH 電路數(shù)量:1 開啟電阻（最大值）: 傳播延遲時(shí)間:10.1 ns 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大工作溫度:+ 85 C 最小工作溫度:0 C 封裝 / 箱體:TSSOP-48 封裝:Reel
SN74ALVC16834DL 功能描述:通用總線函數(shù) 18bit Univ Bus RoHS:否 制造商:Texas Instruments 邏輯類型:CMOS 邏輯系列:74VMEH 電路數(shù)量:1 開啟電阻（最大值）: 傳播延遲時(shí)間:10.1 ns 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大工作溫度:+ 85 C 最小工作溫度:0 C 封裝 / 箱體:TSSOP-48 封裝:Reel
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