- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373471 > SN74ALVC16820 (Texas Instruments, Inc.) Dual Outputs 3.3V 20 Bit Triggers With 3-State Outputs(雙輸出3.3V20位觸發(fā)器) PDF資料下載
參數(shù)資料
| 型號(hào)： | SN74ALVC16820 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Dual Outputs 3.3V 20 Bit Triggers With 3-State Outputs(雙輸出3.3V20位觸發(fā)器) |
| 中文描述： | 3.3V的20位觸發(fā)器三態(tài)輸出（雙輸出3.3V20位觸發(fā)器雙輸出） |
| 文件頁數(shù)： | 1/5頁 |
| 文件大?。?/td> | 97K |
| 代理商： | SN74ALVC16820 |
SN74ALVC16820
3.3-V 10-BIT FLIP-FLOP
WITH DUAL OUTPUTS
SCAS268 – MARCH 1993 – REVISED MARCH 1994
Copyright
1994, Texas Instruments Incorporated
9–1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Member of the Texas Instruments
Widebus
Family
EPIC
(Enhanced-Performance Implanted
CMOS) Submicron Process
Supports Unregulated Battery Operation
Down to 2.7 V
Typical V
OLP
(Output Ground Bounce)
< 0.8 V at V
CC
= 3.3 V, T
A
= 25
°
C
Typical V
OHV
(Output V
OH
Undershoot)
> 2 V at V
CC
= 3.3 V, T
A
= 25
°
C
Bus-Hold On Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages
description
This 10-bit flip-flop is designed specifically for
low-voltage 3.3-V V
CC
operation.
The flip-flops of the SN74ALVC16820 are
edge-triggered D-type flip-flops. On the positive
transition of the clock (CLK) input, the device
provides true data at the Q outputs.
A buffered output-enable (OE) input can be used
to place the ten outputs in either a normal logic
state (high or low level) or a high-impedance state.
In the high-impedance state, the outputs neither
load nor drive the bus lines significantly. The
high-impedance state and increased drive provide
the capability to drive bus lines without need for
interface or pullup components.
The output-enable (OE) input does not affect the internal operation of the flip-flops. Old data can be retained
or new data can be entered while the outputs are in the high-impedance state.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN74ALVC16820 is available in TI’s shrink small-outline (DL) and thin shrink small-outline (DGG)
packages, which provide twice the I/O pin count and functionality of standard small-outline packages in the same
printed-circuit-board area.
The SN74ALVC16820 is characterized for operation from –40
°
C to 85
°
C.
DGG OR DL PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1OE
1Q1
1Q2
GND
2Q1
2Q2
V
CC
3Q1
3Q2
4Q1
GND
4Q2
5Q1
5Q2
6Q1
6Q2
7Q1
GND
7Q2
8Q1
8Q2
V
CC
9Q1
9Q2
GND
10Q1
10Q2
2OE
CLK
D1
NC
GND
D2
NC
V
CC
D3
NC
D4
GND
NC
D5
NC
D6
NC
D7
GND
NC
D8
NC
V
CC
D9
NC
GND
D10
NC
NC
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
P
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SN74ALVC16823 | 18 Bit Bus-Interface Triggers With 3-State Outputs(18位總線接口觸發(fā)器（三態(tài)輸出）) |
| SN74ALVC16825 | 18-Bit Buffers/Drivers With 3-State Outputs(18位緩沖器/驅(qū)動(dòng)器（三態(tài)輸出）) |
| SN74ALVC16827 | 20-Bit Buffers/Drivers With 3-State Outputs(20位緩沖器/驅(qū)動(dòng)器（三態(tài)輸出）) |
| SN74ALVC16828 | 20-Bit Buffers/Drivers With 3-State Outputs(20位緩沖器/驅(qū)動(dòng)器（三態(tài)輸出）) |
| SN74ALVC16841 | 20-Bit Bus-Interface D-Type Latches(20位總線接口D鎖存器（三態(tài)輸出）) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN74ALVC16820DL | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SN74ALVC16834DGGR | 功能描述:通用總線函數(shù) 16bit Univ Bus RoHS:否 制造商:Texas Instruments 邏輯類型:CMOS 邏輯系列:74VMEH 電路數(shù)量:1 開啟電阻（最大值）: 傳播延遲時(shí)間:10.1 ns 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大工作溫度:+ 85 C 最小工作溫度:0 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74ALVC16834DGVR | 功能描述:通用總線函數(shù) 18bit Univ Bus RoHS:否 制造商:Texas Instruments 邏輯類型:CMOS 邏輯系列:74VMEH 電路數(shù)量:1 開啟電阻（最大值）: 傳播延遲時(shí)間:10.1 ns 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大工作溫度:+ 85 C 最小工作溫度:0 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74ALVC16834DL | 功能描述:通用總線函數(shù) 18bit Univ Bus RoHS:否 制造商:Texas Instruments 邏輯類型:CMOS 邏輯系列:74VMEH 電路數(shù)量:1 開啟電阻（最大值）: 傳播延遲時(shí)間:10.1 ns 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大工作溫度:+ 85 C 最小工作溫度:0 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74ALVC16834DLG4 | 功能描述:通用總線函數(shù) 18bit Univ Bus RoHS:否 制造商:Texas Instruments 邏輯類型:CMOS 邏輯系列:74VMEH 電路數(shù)量:1 開啟電阻（最大值）: 傳播延遲時(shí)間:10.1 ns 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大工作溫度:+ 85 C 最小工作溫度:0 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。