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參數資料
| 型號： | SN54LVT652 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 3.3-V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS |
| 中文描述： | 的3.3V ABT生根粉八路總線收發(fā)器和3冊態(tài)輸出 |
| 文件頁數： | 8/11頁 |
| 文件大?。?/td> | 179K |
| 代理商： | SN54LVT652 |
SN54LVT652, SN74LVT652
3.3-V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCBS141E – MAY 1992 – REVISED JULY 1995
8
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
timing requirements over recommended operating free-air temperature range (unless otherwise
noted) (see Figure 2)
SN54LVT652
SN74LVT652
VCC = 3.3 V
±
0.3 V
MIN
VCC = 2.7 V
VCC = 3.3 V
±
0.3 V
MIN
VCC = 2.7 V
UNIT
MAX
MIN
MAX
MAX
MIN
MAX
fclock
tw
Clock frequency
0
150
0
150
0
150
0
150
MHz
Pulse duration, CLK high or low
3.3
3.3
ns
tsu
Setup time, A or B before
CLKAB
↑
or CLKBA
↑
Data high
1.2
1.2
ns
Data low
2
2.5
th
Hold time, A or B after CLKAB
↑
or CLKBA
↑
0.5
0.5
ns
switching characteristics over recommended operating free-air temperature range, C
L
= 50 pF
(unless otherwise noted) (see Figure 2)
SN54LVT652
SN74LVT652
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 3.3 V
±
0.3 V
MIN
VCC = 2.7 V
VCC = 3.3 V
±
0.3 V
MIN
TYP
VCC = 2.7 V
UNIT
MAX
MIN
MAX
MAX
MIN
MAX
fmax
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tPZH
tPZL
tPHZ
tPLZ
150
150
MHz
CLKBA or
CLKAB
A or B
1.8
3.7
6
6.9
ns
2
3.7
5.7
6.4
A or B
B or A
1.2
2.8
4.7
5.5
ns
1
2.6
4.6
5.3
SBA or SAB
A or B
1.4
3.7
6.4
7.6
ns
1.4
4
6.2
6.8
OEBA
A
1
2.9
5.8
7.2
ns
1
3
6
7.3
OEBA
A
2.2
3.9
6.5
6.9
ns
1.8
3.2
5.8
5.9
OEAB
B
1
3.3
6.5
7.5
ns
1.2
3.4
6.3
7.1
OEAB
B
1.7
1.5
4.5
3.8
7.2
5.8
8.1
6.3
ns
All typical values are at VCC = 3.3 V, TA = 25
°
C.
These parameters are measured with the internal output state of the storage register opposite to that of the bus input.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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