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參數(shù)資料
| 型號(hào)： | SM8213 |
| 廠商： | Seiko NPC Corporation |
| 英文描述： | MINIATURE POWER RELAY |
| 中文描述： | POCSAG碼解碼器多幀尋呼機(jī) |
| 文件頁數(shù)： | 15/33頁 |
| 文件大小： | 171K |
| 代理商： | SM8213 |
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SM8213AM
NIPPON PRECISION CIRCUITS—15
Address/Parameter Data Transmission (CPU to SM8213AM)
After device reset initialization, the address and
parameter data is transmitted from the CPU in 32-bit
batches, 1 parameter batch and 8 address batches for
a total of 9 batches (288 bits), on SDI in sync with
the falling edge of the SCK clock (see “Power-ON
Mode” section).
The SM8213AM supports 8 independent addresses
(7 normal addresses: A, B, C, D, E, F, G and H + 1
dummy address: H). Also, each address can be
assigned a frame number to cover all kinds of group
calls or subsidiary services.
Any of the 8 addresses can be individually disabled
using the “ADDRESS ENABLE” flag when setting
the addresses.
Conversely, is less than 7 addresses are used, then
the use of address H is restricted and as a result the
device can be used as a normal decoder.
The address data for each of the 8 addresses com-
prises an 18-bit address plus two function bits used
to select one of four sub-addresses. Then, one MSB
bit (0 for address signals), ten BCH(31,21) format
generated check bits and an even-parity bit are added
to form 32-bit code word representing the address
information which is then stored in RAM. This
address information is then compared with the
received data to determine correct addressing.
Ensure that there are not multiple writes requests to
turn ON the same address.
Even if the number of addresses used is less than 8,
all addresses should be set immediately after power
is applied and immediately after reset. If not all
addresses are set, subsequent operation may become
unstable.
Each address is 18 bits long and should be input
MSB first. Refer to the “AC Characteristics” section
for SCK and data specifications, and the
“Data/Flags” section for data and flag functions.
When setting parameters and addresses in write
mode, the SCK clock frequency should not be less
than 1200 Hz. If this occurs, the SCK counter is rein-
itialized. This function, however, does make restor-
ing operation easy even if this or another clock is
accidentally input.
Figure 8. Address/parameter transmit timing
BUSY
ATTN
SCK
SDI
SDO
BUSY
WRITE MODE
PREAMBLE MODE
:
8-bit unit time data
:
8-bit unit time clock
:
8-bit unit time indeterminate data
D A T
A
D A T
A
READ
READY
START
WRITE
READ
D A T
A
:
32-bit unit time parameter/address data
max
28.4ms
Refer to the AC Characteristics section for detailed timing specifications.
2bit time max
1.67ms max
129ms max
129ms max
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| SM8213AM | 制造商:NPC 制造商全稱:Nippon Precision Circuits Inc 功能描述:POCSAG Decoder For Multiframe Pagers |
| SM821C906ZAA | 制造商:AVX Corporation 功能描述:- Bulk |
| SM8220 | 制造商:NPC 制造商全稱:Nippon Precision Circuits Inc 功能描述:Calling Number Identification Receiver IC |
| SM8221 | 制造商:NPC 制造商全稱:Nippon Precision Circuits Inc 功能描述:Calling Number Identification Receiver IC |
| SM8222 | 制造商:NPC 制造商全稱:Nippon Precision Circuits Inc 功能描述:Caller ID Service IC with Call Waiting |
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