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參數(shù)資料
| 型號： | SLC88B17QFP |
| 廠商： | STANDARD MICROSYSTEMS CORP |
| 元件分類： | 總線控制器 |
| 英文描述： | ISA BUS CONTROLLER, PQFP160 |
| 封裝： | QFP-160 |
| 文件頁數(shù)： | 18/54頁 |
| 文件大?。?/td> | 333K |
| 代理商： | SLC88B17QFP |
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SMSC DS – SLC88B17
Page 25
Rev. 09/28/99
TESTABILITY
The SLC88B17 provides Tri-state and NAND Tree test modes. The test modes are selected from DREQ[6:5] inputs
when the nTESTIN is active
Table 4 - Test Modes
TEST MODE
nTESTIN
DREQ6
DREQ5
Normal Operation
1
X
Tri-state
0
NAND Chain Test
0
1
Reserved
0
1
X
Note: Care should be taken to avoid the “reserved” input combination
Tri-state Test
This test mode tri-states all outputs including the NAND tree outputs, BALE, and RSTDRV.
NAND Tree Mode
This test mode tri-states all output and bi-directional buffers except for BALE and RSTDRV. Every output buffer,
except BALE and RSTDRV, is configured as an input in NAND Tree mode and included in the NAND chain. The first
input of the NAND chain is nZEROWS.
The NAND chain is routed counter-clockwise around the chip (eg.,
nZEROWS, nIOCHK, SD7,…). BALE is an intermediate output and RSTDRV is the final output. nTESTIN, DREQ6,
DREQ5, BALE and RSTDRV pins are not included in the NAND chain.
To perform a NAND Tree test, all pins included in the NAND tree should be driven to 1, beginning with nZEROWS
and working counterclockwise around the chip. Each pin can be toggled and a resulting toggle can be observed on
BALE or RSTDRV.
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