參數(shù)資料
型號: SKY72310-362
廠商: Skyworks Solutions Inc
文件頁數(shù): 16/19頁
文件大?。?/td> 0K
描述: IC SYNTHESIZER 2.1GHZ 24QFN
標(biāo)準(zhǔn)包裝: 1
類型: 分?jǐn)?shù) N 合成器(RF)
PLL:
輸入: 時鐘,晶體
輸出: 時鐘,晶體
電路數(shù): 1
比率 - 輸入:輸出: 2:2
差分 - 輸入:輸出: 是/是
頻率 - 最大: 2.1GHz
除法器/乘法器: 是/無
電源電壓: 2.7 V ~ 3.3 V
工作溫度: -45°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 24-QFN 裸露焊盤(4x4)
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: 863-1272-6
DATA SHEET SKY72310 FREQUENCY SYNTHESIZER
Skyworks Solutions, Inc. Phone [781] 376-3000 Fax [781] 376-3100 sales@skyworksinc.com www.skyworksinc.com
6
July 30, 2008 Skyworks Proprietary and Confidential information Products and Product Information are Subject to Change Without Notice 200705E
Case 2: To achieve a desired Fvco_main frequency of 917.7786 MHz using a crystal frequency of 19.2 MHz with operation
of the synthesizer in 10-bit mode. Since the maximum internal reference frequency (Fdiv_ref) is 25 MHz, the crystal
frequency does not require the internal division to be greater than 1, which makes Fdiv_ref = 19.2 MHz. Therefore:
Nfractional
=
Fvco_main
Fdiv_ref
= 917.7786
19.2
= 47.80097
The value to be programmed in the Divider Register is:
Nreg = Round[Nfractional] – 32
= Round[47.80087] – 32
= 48 – 32
= 16 (decimal)
= 000010000 (binary)
With the modulator in 10-bit mode, the value to be programmed in the Dividend Registers is:
dividend = Round[divider × (Nfractional – Nreg – 32)]
= Round[1024 × (47.80087 – 16 – 32)]
= Round[1024× (–0.1990312)]
= Round[–203.808]
= 204 (decimal)
= 1100110100 (binary)
where 11 0011 0100 is loaded in the Dividend MSB Register.
Summary:
Divider Register = 0 0001 0000
Dividend MSB Register = 11 0011 0100
The resulting VCO frequency is 917.775 MHz
Step size is 18.75 kHz
Note: The frequency step size for this case is 19.2 MHz divided by 210, giving 18.75 kHz.
S1060
Figure 4. Fractional-N Applications: Sample Calculation (2 of 2)
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