參數(shù)資料
型號(hào): SIS300
廠商: SILICON INTEGRATED SYSTEMS CORP
元件分類: 圖形處理器
英文描述: GRAPHICS PROCESSOR, PBGA365
封裝: 27 X 27 MM, BGA-365
文件頁數(shù): 39/115頁
文件大?。?/td> 2426K
代理商: SIS300
SiS300 2D/3D/Video/DVD Accelerator
Preliminary V0.3 March 23, 1999
ii
Silicon Integrated Systems Corporation
5.1.3
Input Status Register 0 ....................................................................... 44
5.1.4
Input Status Register 1 ....................................................................... 44
5.1.5
VGA Enable Register.......................................................................... 45
5.1.6
Segment Selection Register 0............................................................. 45
5.1.7
Segment Selection Register 1............................................................. 45
5.2
CRT Controller Registers .......................................................................... 45
5.2.1
CRT Controller Index Register ............................................................ 45
5.2.2
CR0: Horizontal Total ........................................................................ 47
5.2.3
CR1: Horizontal Display Enable End.................................................. 47
5.2.4
CR2: Horizontal Blank Start ............................................................... 47
5.2.5
CR3: Horizontal Blank End ................................................................ 47
5.2.6
CR4: Horizontal Retrace Start............................................................ 47
5.2.7
CR5: Horizontal Retrace End............................................................. 47
5.2.8
CR6: Vertical Total............................................................................. 48
5.2.9
CR7: Overflow Register ..................................................................... 48
5.2.10 CR8: Preset Row Scan ...................................................................... 48
5.2.11 CR9: Maximum Scan Line/Text Character Height.............................. 48
5.2.12 CRA: Text Cursor Start ...................................................................... 48
5.2.13 CRB: Text Cursor End ....................................................................... 49
5.2.14 CRC: Screen Start Address High....................................................... 49
5.2.15 CRD: Screen Start Address Low........................................................ 49
5.2.16 CRE: Text Cursor Location High........................................................ 49
5.2.17 CRF: Text Cursor Location Low......................................................... 49
5.2.18 CR10: Vertical Retrace Start.............................................................. 49
5.2.19 CR11: Vertical Retrace End............................................................... 49
5.2.20 CR12: Vertical Display Enable End.................................................... 50
5.2.21 CR13: Screen Offset.......................................................................... 50
5.2.22 CR14: Underline Location Register.................................................... 50
5.2.23 CR15: Vertical Blank Start ................................................................. 50
5.2.24 CR16: Vertical Blank End .................................................................. 51
5.2.25 CR17: Mode Control Register ............................................................ 51
5.2.26 CR18: Line Compare Register ........................................................... 51
5.2.27 CR1B: CRT Horizontal Counter Read Back ....................................... 51
5.2.28 CR1C: CRT Vertical Counter Read Back............................................ 52
5.2.29 CR1D: CRT Overflow Counter Read Back.......................................... 52
5.2.30 CR1E: Extended Signature Read-Back Register 2 ............................ 52
5.2.31 CR20: CRT Counter Trigger Port....................................................... 52
5.2.32 CR24: Attribute Controller Toggle Read-back Register ...................... 52
5.2.33 CR26: Attribute Controller Index Read-back Register ........................ 52
5.3
Sequencer Registers................................................................................. 53
5.3.1
Sequencer Index Register .................................................................. 53
5.3.2
SR0: Reset Register .......................................................................... 53
5.3.3
SR1: Clock Mode Register................................................................. 53
5.3.4
SR2: Color Plane Write Enable Register............................................ 54
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