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| 型號(hào)： | SiI3114CTU |
| 廠商： | Silicon Image, Inc. |
| 英文描述： | PCI to Serial ATA Controller |
| 中文描述： | PCI到Serial ATA控制器 |
| 文件頁(yè)數(shù)： | 41/127頁(yè) |
| 文件大?。?/td> | 598K |
| 代理商： | SII3114CTU |
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SiI
3114 PCI to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
Bit [01]
: BA5 Ind Acc Ena (R/W) – BA5 Indirect Access Enable. This bit is set to enable indirect access to
BA5 address space using Configuration Space registers C0
H
and C4
H
(BA5 Indirect Address and BA5
Indirect Access).
Bit [00]
: PCI Hdr Wr Ena (R/W) – PCI Configuration Header Write Enable. This bit is set to enable write
access to the following registers in the PCI Configuration Header: Device ID (03-02
H
), PCI Class Code (09-
0B
H
), Subsystem Vendor ID (2D-2C
H
), and Subsystem ID (2F-2E
H
).
2007 Silicon Image, Inc.
33
SiI
-DS-0103-D
Software Data Register
Address Offset: 44
H
Access Type: Read/Write
Reset Value: Undefined
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
Software Data
This register is used by the software for non-resettable data storage. The contents are unknown on power-up and
are never cleared by any type of reset.
Power Management Capabilities
Address Offset: 60
H
Access Type: Read Only
Reset Value: 0x0622_0001
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
P
PME Support
P
Auxiliary
Current
D
R
P
PPM Rev
Next Item Pointer
Capability ID
This register defines the power management capabilities associated with the PCI bus. The register bits are
defined below.
Bit [31:27]
: PME Support (R) – Power Management Event Support. This bit field is hardwired to 00
H
to
indicate that the
SiI
3114 does not support PME.
Bit [26]
: PPM D2 Support (R) – PCI Power Management D2 Support. This bit is hardwired to 1 to indicate
support for the D2 Power Management State.
Bit [25]
: PPM D1 Support (R) – PCI Power Management D1 Support. This bit is hardwired to 1 to indicate
support for the D1 Power Management State.
Bit [24:22]
: Auxiliary Current (R) – Auxiliary Current. This bit field is hardwired to 000
B
.
Bit [21]
: Dev Special Init (R) – Device Special Initialization. This bit is hardwired to 1 to indicate that the
SiI
3114 requires special initialization
Bit [20]
: Reserved (R). This bit is reserved and returns zero on a read.
Bit [19]
: PME Clock (R) – Power Management Event Clock. This bit is hardwired to 0. The
SiI
3114 does
not support PME.
Bit [18:16]
: PPM Rev (R) – PCI Power Management Revision. This bit field is hardwired to 010
B
to indicate
compliance with the PCI Power Management Interface Specification revision 1.1.
Bit [15:08]
: Next Item Pointer (R) – PCI Additional Capability Next Item Pointer. This bit field is hardwired to
00
H
to indicate that there are no additional items on the Capabilities List.
Bit [07:00]
: Capability ID (R) – PCI Additional Capability ID. This bit field is hardwired to 01
H
to indicate that
this Capabilities List is a PCI Power Management definition.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SII3124A | PCI-X to Serial ATA Controller |
| SiI3124ACBHU | PCI-X to Serial ATA Controller |
| SII3132 | PCI Express to 2-Port Serial ATA II Host Controller |
| SII3512 | PCI to Serial ATA Controller |
| SiI3512ECTU128 | PCI to Serial ATA Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SII3124A | 制造商:SILICONIMAGE 制造商全稱:SILICONIMAGE 功能描述:PCI-X to Serial ATA Controller |
| SII3124ACBHU | 制造商:SILICONIMAGE 制造商全稱:SILICONIMAGE 功能描述:PCI-X to Serial ATA Controller |
| SII3132 | 制造商:SILICONIMAGE 制造商全稱:SILICONIMAGE 功能描述:PCI Express to 2-Port Serial ATA II Host Controller |
| SII3132CNU | 制造商:Silicon Image Inc 功能描述:PCI Express to Serial ATA Controller 88-Pin QFN |
| SII3512 | 制造商:SILICONIMAGE 制造商全稱:SILICONIMAGE 功能描述:PCI to Serial ATA Controller |
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