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參數(shù)資料
| 型號： | SI5338N-A00000-GMR |
| 廠商： | SILICON LABORATORIES |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 700 MHz, PROC SPECIFIC CLOCK GENERATOR, QCC24 |
| 封裝： | 4 X 4 MM, ROHS COMPLIANT, MO-220VGGD-8, QFN-24 |
| 文件頁數(shù)： | 19/34頁 |
| 文件大?。?/td> | 285K |
| 代理商： | SI5338N-A00000-GMR |
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Si5338
26
Rev. 0.5
4IN4
I
Multi
This pin can have one of the following functions
depending on the part number
I2C_LSB (for Si5338A/B/C & Si5338K/L/M devices only)
This is the LSB of the Si5338 I2C address. 0 = I2C
address 70h, 1 = I2C address 71h.
FDBK (for Si5338N/P/Q devices only)
Provides a high-impedance feedback input for single
ended clock signals such as CMOS, SSTL or HSTL.
This input should be dc-coupled as shown in section 3.2
Figure 3. If this pin is not used, it should be connected to
ground.
PDEC (for Si5338D/E/F) devices only)
Used as the phase decrement pin. See section 3.8.2 for
more details. Minimum pulse width of 100 ns is required
for proper operation. If this pin is not used, it should be
connected to ground.
FDEC (for Si5338G/H/J devices only)
Used as the frequency decrement pin. See section 3.8.1
for more details. Minimum pulse width of 100 ns is
required for proper operation. If this pin is not used, it
should be connected to ground.
5
IN5/IN6
IMulti
FDBK/FDBKB
These pins can be used as a differential feedback input
in zero delay buffer mode, or as a secondary clock input.
See section 3.2 Figure 3 for termination details. See
section 3.8.3 for zero delay buffer mode set-up.
When not in use, leave IN5 unconnected and IN6
connected to GND.
6
7
VDD
Supply
Core Supply Voltage
This is the core supply voltage which can operate from a
1.8, 2.5, or 3.3 V supply. A 0.1 F bypass capacitor
should be located very close to this pin.
8
INTR
O
Open Drain
Interrupt
This pin functions as a maskable interrupt output.
0 = No interrupt.
1 = Interrupt present.
This pin requires a pull-up resistor of at least 1 k
.
9
CLK3B
O
Multi
Output Clock B for Channel 3
May be a single-ended output or half of a differential out-
put with CLK3A being the other differential half.
Table 14. Si5338 Pin Descriptions (Continued)
Pin #
Pin Name
I/O
Signal Type
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SI5338N-AXXXXXGM | 700 MHz, PROC SPECIFIC CLOCK GENERATOR, QCC24 |
| SL28540ALCT | OTHER CLOCK GENERATOR, QCC56 |
| SL5504 | 1 CHANNEL TRANSISTOR OUTPUT OPTOCOUPLER |
| SL5582.3S | 1 CHANNEL TRANSISTOR OUTPUT OPTOCOUPLER |
| SLA-360MTT32S | T-1 SINGLE COLOR LED, YELLOW GREEN, 3.1 mm |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SI5338N-A00211-GMR | 制造商:Silicon Laboratories Inc 功能描述:CLOCK - Tape and Reel |
| SI5338N-A01659-GM | 制造商:Silicon Laboratories Inc 功能描述:CLOCK - Bulk |
| SI5338N-A01659-GMR | 制造商:Silicon Laboratories Inc 功能描述:CLOCK - Tape and Reel |
| Si5338N-A-GM | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 I2C-prgrmmbl clock generatr .16-700 MHz RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| SI5338N-A-GMR | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 I2C Program Clk Gen 0.16-710MHz 4Clk In RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
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