參數(shù)資料
型號(hào): SI3225PPTX-EVB
廠商: Silicon Laboratories Inc
文件頁(yè)數(shù): 10/112頁(yè)
文件大?。?/td> 0K
描述: BOARD EVAL W/DISCRETE INTERFACE
設(shè)計(jì)資源: Si3225PPTX-EVB Schematics/Layout
標(biāo)準(zhǔn)包裝: 1
系列: ProSLIC®
主要目的: 接口,模擬前端(AFE)
已用 IC / 零件: Si3225
已供物品: 板,CD
Si3220/25 Si3200/02
Rev. 1.3
107
Not
Recommended
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6. Package Outline: 64-Pin TQFP
Figure 65 illustrates the package details for the Dual ProSLIC. Table 53 lists the values for the dimensions shown
in the illustration.
Figure 65. 64-Pin Exposed Pad TQFP
Table 53. Package Dimensions
Symbol
Millimeters
Symbol
Millimeters
Min
Nom
Max
Min
Nom
Max
A
1.20
e
0.50 BSC
A1
0.05
0.15
L
0.45
0.60
0.75
A2
0.95
1.00
1.05
aaa
0.20
b
0.17
0.22
0.27
bbb
0.20
c
0.09
0.20
ccc
0.08
D, E
12.00 BSC
ddd
0.08
D1, E1
10.00 BSC
0
3.5
7
D2, E2
5.85
6.00
6.15
Notes:
1.
All dimensions are shown in millimeters unless otherwise noted.
2.
Dimensioning and tolerancing per ANSI Y14.5M-1982.
3.
This package outline conforms to JEDEC MS-026, variant ACD-HD.
4.
Recommended card reflow profile is per the JEDEC/IPC J-STD-020C specification for Small Body
Components.
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