參數(shù)資料
    

    


    


    
型號(hào)：
SI3019-F-FS

    

    
廠商：
Silicon Laboratories Inc

    

    
文件頁(yè)數(shù)：
44/94頁(yè)

    

    
文件大?。?/td>
0K

    

    
描述：
IC LINE-SIDE DAA 16SOIC

    

    
標(biāo)準(zhǔn)包裝：
48

    

    
系列：
ISOcap™

    

    
數(shù)據(jù)格式：
V.92
    		

    

    
電源電壓：
3 V ~ 3.6 V
    		

    

    
安裝類(lèi)型：
表面貼裝
    		

    

    
封裝/外殼：
16-SOIC（0.154"，3.90mm 寬）
    		

    

    
供應(yīng)商設(shè)備封裝：
16-SOIC N
    		

    

    
包裝：
管件
    		

    

    

    

	
    
    
    

    
    
	
    Si3056
    Si3018/19/10
    Rev. 1.05
    49
    Reset settings = 0000_0000
    Register 1. Control 1
    Bit
    D7D6D5D4D3D2D1D0
    Name
    SR
    PWMM[1:0]
    PWME
    IDL
    SB
    Type
    R/W
    Bit
    Name
    Function
    7SR
    Software Reset.
    0 = Enables the DAA for normal operation.
    1 = Sets all registers to their reset value.
    Note:
    Bit automatically clears after being set.
    6
    Reserved
    Read returns zero.
    5:4
    PWMM[1:0] Pulse Width Modulation Mode.
    Used to select the type of signal output on the call progress AOUT pin.
    00 = PWM output is clocked at 16.384 MHz as a delta-sigma data stream. A local density of
    1s and 0s tracks the combined transmit and receive signals.
    01 = Balanced conventional PWM output signal has high and low portions of the modulated
    pulse that are centered on the 16 kHz sample clock.
    10 = Conventional PWM output signal returns to logic 0 at regular 32 kHz intervals and rises
    at a time in the 32 kHz period proportional to its instantaneous amplitude.
    11 = Reserved.
    3PWME
    Pulse Width Modulation Enable.
    Sums the transmit and receive audio paths and presents it as a CMOS digital-level output of
    0 = Pulse width modulation signal for AOUT disabled.
    1 = Pulse width modulation signal for call progress analog output (AOUT) enabled.
    2
    Reserved
    Read returns zero.
    1IDL
    Isolation Digital Loopback.
    0 = Digital loopback across the isolation barrier is disabled.
    1 = Enables digital loopback mode across the isolation barrier. The line-side device must be
    enabled and off hook before setting this mode. This data path includes the TX and RX filters.
    0SB
    Serial Digital Interface Mode.
    0 = Operation is in 15-bit mode, and the LSB of the data field indicates that a secondary
    frame is required.
    1 = The serial port is operating in 16-bit mode and requires a secondary frame sync signal,
    FC, to initiate control data reads/writes.
    
    
    
    
    
    


    


    

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SI3019-F-FSR
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Si3019-F-FT
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SI3019-F-FTR
 制造商:Silicon Laboratories Inc 功能描述:Voice DAA Chipset 16-Pin TSSOP T/R 制造商:Silicon Laboratories Inc 功能描述:LEAD FREE - Tape and Reel 制造商:Silicon Laboratories Inc 功能描述:MODEM CHIP CHIPSET 20-PIN TSSOP T/R

    

    
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SI3019-F-GMR
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