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| 型號： | sda 9254-2 |
| 廠商： | SIEMENS AG |
| 英文描述： | 2.6 MBit Dynamic Sequential Access Memory for Television Applications (TV-SAM) with On-chip Noise Reduction Filter(應用于TV的2.6 M位動態(tài)存儲器) |
| 中文描述： | 2.6兆比特的動態(tài)影視順序訪問應用程序的內(nèi)存（電視，SAM）的具有片上降噪過濾器（應用于電視的260萬位動態(tài)存儲器） |
| 文件頁數(shù)： | 2/32頁 |
| 文件大?。?/td> | 182K |
| 代理商： | SDA 9254-2 |
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SDA 9254-2
Semiconductor Group
2
1998-01-16
Functional Description
General
The SDA 9254-2 is a combination of the TV-SAM SDA 9253 and an adaptive recursive filter to
achieve a reduction of noise for video signals. To get a closed loop one of the two output ports of
the triple port memory is connected internally to the noise reduction filter. External access to this
port is not possible. The characteristic of the noise reduction filter is adjustable via three pins
(CLASS2, CLASS1, CLASS0).
Figure 1
Block Diagram
The memory capacity of the SDA 9254-2 enables a field based filtering of 4:1:1 video signals (pin
NR422 = ‘0’). 4:2:2 applications are supported by a special noise reduction mode (pin NR422 = ‘1’).
In this mode filtering is applied only to the luminance signal, the chrominance signals are delayed
by an internal delay line but remain unfiltered. For the storage of 4 bit planes of the chrominance
signal a SDA 9251-2X is requested additionally.
Noise
Reduction
Filter
Memory
Field
Port C
Port B
Port A
12
12
12
12
3
SDC0 ... 11
BLN
NR422
CLASS
SQA0 ... 11
UEB10379
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SDA9254-2 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:2.6 MBit Dynamic Sequential Access Memory for Television Applications (TV-SAM) with On-chip Noise Reduction Filter |
| SDA9255 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:SRC-Scan Rate Converter SDA9255 |
| SDA9257 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Clock Sync Generator |
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| SDA9280 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:ICs for Consumer Electronics |
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