參數資料
型號： SCF5250CPV120
廠商： Motorola, Inc.
英文描述： SCF5250 Integrated ColdFire Microprocessor
中文描述： SCF5250提供了集成的ColdFire微處理器
文件頁數： 4/48頁
文件大?。?/td> 767K
代理商： SCF5250CPV120
SCF5250 Integrated ColdFire Microprocessor Data Sheet, Rev. 1.1
Introduction
Freescale Semiconductor
4
space, a 16-bit data bus, Output Enable, and Read/Write signals. This interface implements an extended
synchronous protocol that supports bursting operations.
1.2.9
Serial Audio Interfaces
The SC5250 digital audio interface provides three serial Philips IIS/Sony EIAJ interfaces. One interface
is a 4-pin (1 bit clock, 1 word clock, 1 data in, 1 data out), the other two interfaces are 3-pin (1 bit clock,
1 word clock, 1 data in or out). The serial interfaces have no limit on minimum sampling frequency.
Maximum sampling frequency is determined by maximum frequency on bit clock input. This is 1/3 the
frequency of the internal system clock.
1.2.10 IEC958 Digital Audio Interfaces
The SCF5250 has one digital audio input interface, and one digital audio output interface. The single
output carries the consumer “c” channel.
1.2.11 Audio Bus
The audio interfaces connect to an internal bus that carries all audio data. Each receiver places its received
data on the audio bus and each transmitter takes data from the audio bus for transmission. Each transmitter
has a source select register.
In addition to the audio interfaces, there are six CPU accessible registers connected to the audio bus. Three
of these registers allow data reads from the audio bus and allow selection of the audio source. The other
three register provide a write path to the audio bus and can be selected by transmitters as the audio source.
Through these registers, the CPU has access to the audio samples for processing.
Audio can be routed from a receiver to a transmitter without the data being processed by the core so the
audio bus can be used as a digital audio data switch. The audio bus can also be used for audio format
conversion.
1.2.12 CD-ROM Encoder/Decoder
The SCF5250 is capable of processing CD-ROM sectors in hardware. Processing is compliant with
CD-ROM and CD-ROM XA standards.
The CD-ROM decoder performs following functions in hardware:
Sector sync recognition
Descrambling of sectors
Verification of the CRC checksum for Mode 1, Mode 2 Form 1, and Mode 2 Form 2 sectors
Third-layer error correction is not performed
The CD-ROM encoder performs following functions in hardware:
Sector sync recognition
Scrambling of sectors
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SCF5250LAG100 功能描述:IC MPU COLDFIRE 100MHZ 144-LQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:SCF52xx 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:260 系列:73S12xx 核心處理器:80515 芯體尺寸:8-位 速度:24MHz 連通性:I²C，智能卡，UART/USART，USB 外圍設備:LED，POR，WDT 輸入/輸出數:9 程序存儲器容量:64KB（64K x 8） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:2K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數據轉換器:- 振蕩器型:內部 工作溫度:-40°C ~ 85°C 封裝/外殼:68-VFQFN 裸露焊盤 包裝:管件
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