參數(shù)資料
型號(hào): SC9318FB
廠商: 杭州士景電子有限公司
英文描述: DIGITAL TUNING SYSTEM
中文描述: 數(shù)字調(diào)諧系統(tǒng)
文件頁數(shù): 9/36頁
文件大?。?/td> 671K
代理商: SC9318FB
Silan
Semiconductors
SC9318-033
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
Rev: 1.0 2002-01-16
9
(Continued)
Pin
No.
Symbol
Pin Name
Internal
Connection
Description
47
MUTE
Muting output
port
1 bit output port. Normally, this port is used for
muting control signal output. This pin can set
the internal MUTE bit to “1” according to a
change in the input of I/O port 1. MUTE bit
output logic can be changed; PLL phase
difference can also be output using this pin.
49
HOLD
HOLD mode
control input
Input pin for request/release HOLD mode.
Normally, this pin is used to input radio mode
selection signals or battery detection signals.
HOLD mode includes CLOCK STOP mode
(stops crystal oscillation) and WAIT mode
(halts CPU). Setting is implemented with the
CKSTP instruction or the WAIT instruction.
When the CKSTP instruction is executed,
request/release of the HOLD mode depends on
the internal MODE bit. If the MODE bit is “0”
(MODE-0), executing the CKSTP instruction
while the
HOLD
pin is at low level stops the
clock generator and the CPU and changes to
memory back-up mode. If the MODE bit is “1”
(MODE-1), executing the CKSTP instruction
enters memory back-up mode regardless of the
level of the
HOLD
pin. Memory back-up is
release when the
HOLD
pin goes high in
MODE-0, or when the level of the
HOLD
pin
low in MODE-1.
When memory back-up mode is entered by
executing a WAIT instruction, any change in
the
HOLD
pin input releases the mode.
In memory back-up mode, current consumption
is low (below 10
μ
A), and all the output pins
(e.g., display output, output ports) are
automatically set to low level.
(To be continued)
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