參數(shù)資料
型號: SC9318FB
廠商: 杭州士景電子有限公司
英文描述: DIGITAL TUNING SYSTEM
中文描述: 數(shù)字調(diào)諧系統(tǒng)
文件頁數(shù): 13/36頁
文件大小: 671K
代理商: SC9318FB
Silan
Semiconductors
SC9318-033
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
Rev: 1.0 2002-01-16
13
(Continued)
Pin
No.
Symbol
Pin Name
Internal
Connection
Description
61
V
LCD
62
C1
63
C2
Voltage
double
boosting pin
V
LCD
Voltage doubler boosting pin for driving the
LCD.
A capacitor (0.1
μ
F Typ.) is connected to boost
the voltage.
The V
LCD
pin outputs voltage (3.0V), which has
been doubled from the constant voltage (V
EE
:
1.5V) using the capacitors connected between
C1 and C2. That potential is supplied to the
LCD drivers. If the internal V
LCD
OFF bit is set
to “1” by program, an external power supply
can be input through the V
LCD
pin to drive the
LCD.
At this time, the V
LCD
/2 potential, whose V
LCD
voltage is divided using registers, is output from
the C2 pin.
64
V
EE
Constant
voltage supply
pin
--
1.5V constant voltage supply pin for driving the
LCD.
A
stabilizing
capacitor
(0.1
μ
F
Typ.)
is
connected. This is a reference voltage for the
A/D converter, key input, and the LCD common
output’s bias potential.
Note: 1. When the device is reset (voltage higher than 1.8V, or when
RESET
=low
high), I/O ports are set to input,
the pins for I/O ports and additional functions (e.g., A/D converter) are set to I/O port input pins, while the
IFIN/IN pins become IF input pins.
2. When in PLL OFF mode (when the three bits in the internal reference ports all show “1”), the IFIN and FMIN,
AMIN pins are pulled down, and DO1 And DO2 are at high impedance.
3. When in CLOCK STOP mode (during execution of CKSTP instruction), the output port and the LCD output
pins are all at low level, while the constant voltage circuit (V
EE
), the voltage doubler circuit (V
LCD
), and the
power supply for the crystal oscillator (V
XT
) are all off.
4. When the device is being reset, the contents of the output ports and internal ports are undefined and
initialization by program is necessary.
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