參數(shù)資料
型號： SC80C52XXX-36/883
廠商： TEMIC SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 36 MHz, MICROCONTROLLER, CDIP40
封裝： SIDE BRAZED, 40 PIN
文件頁數(shù)： 76/109頁
文件大小： 10824K
代理商： SC80C52XXX-36/883
54
ATtiny20 [DATASHEET]
8235E–AVR–03/2013
Port B, Bit 0 – T0/CLKI/TPICLK/PCINT8
T0: Timer/Counter0 Clock Source.
CLKI: Clock Input from an external clock source, see “External Clock” on page 18.
TPICLK: Serial Programming Clock.
PCINT8: Pin Change Interrupt source 8. The PB0 pin can serve as an external interrupt source for pin
change interrupt 1.
Port B, Bit 1 – OC1A/SDA/MOSI/TPIDATA/PCINT9
OC1A: Output Compare Match output. Provided that the pin has been configured as an output it serves as
an external output for Timer/Counter1 Compare Match A. This pin is also the output for the timer/counter
PWM mode function.
SDA: TWI Data. The pin is disconnected from the port and becomes the serial data for the TWI when TWEN
in TWSCRA is set. In this mode of operation, the pin is driven by an open drain driver with slew rate
limitation and a spike filter.
MOSI: SPI Master Output / Slave Input. Regardless of DDB1, this pin is automatically configured as an input
when SPI is enabled as a slave. The data direction of this pin is controlled by DDB1 when SPI is enabled as
a master.
TPIDATA: Serial Programming Data.
PCINT9: Pin Change Interrupt source 9. The PB1 pin can serve as an external interrupt source for pin
change interrupt 1.
Port B, Bit 2 – INT0/OC0A/OC1B/MISO/CKOUT/PCINT10
INT0: External Interrupt Request 0.
OC0A: Output Compare Match output. Provided that the pin has been configured as an output it serves as
an external output for Timer/Counter0 Compare Match A. This pin is also the output for the timer/counter
PWM mode function.
OC1B: Output Compare Match output. Provided that the pin has been configured as an output it serves as
an external output for Timer/Counter1 Compare Match B. This pin is also the output for the timer/counter
PWM mode function.
MISO: SPI Master Input / Slave Output. Regardless of DDB2, this pin is automatically configured as an input
when SPI is enabled as a master. The data direction of this pin is controlled by DDB2 when SPI is enabled
as a slave.
CKOUT - System Clock Output: The system clock can be output on the PB2 pin. The system clock will be
output if the CKOUT Fuse is programmed, regardless of the PORTB2 and DDB2 settings. It will also be
output during reset.
PCINT10: Pin Change Interrupt source 10. The PB2 pin can serve as an external interrupt source for pin
change interrupt 1.
Port B, Bit 3 – RESET/PCINT11
RESET: External Reset input is active low and enabled by unprogramming (“1”) the RSTDISBL Fuse. Pullup
is activated and output driver and digital input are deactivated when the pin is used as the RESET pin.
PCINT11: Pin Change Interrupt source 11. The PB3 pin can serve as an external interrupt source for pin
change interrupt 1.
Table 10-8 and Table 10-9 relate the alternate functions of Port B to the overriding signals shown in Figure 10-6 on page
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