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您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄25635 > SC80C52XXX-12SV (ATMEL CORP) 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CDIP40 PDF資料下載

型號：	SC80C52XXX-12SV
廠商：	ATMEL CORP
元件分類：	微控制器/微處理器
英文描述：	8-BIT, MROM, 12 MHz, MICROCONTROLLER, CDIP40
封裝：	0.600 INCH, SIDE BRAZED, DIP-40
文件頁數(shù)：	5/1021頁
文件大?。?/td>	15196K
代理商：	SC80C52XXX-12SV

32072H–AVR32–10/2012

AT32UC3A3

SPI disable does not work in SLAVE mode

SPI disable does not work in SLAVE mode.

Fix/Workaround

Read the last received data, then perform a software reset by writing a one to the Software

Reset bit in the Control Register (CR.SWRST).

SPI bad serial clock generation on 2nd chip_select when SCBR=1, CPOL=1, and

When multiple chip selects (CS) are in use, if one of the baudrates equal 1 while one

(CSRn.SCBR=1) of the others do not equal 1, and CSRn.CPOL=1 and CSRn.NCPHA=0,

then an additional pulse will be generated on SCK.

Fix/Workaround

When multiple CS are in use, if one of the baudrates equals 1, the others must also equal 1

if CSRn.CPOL=1 and CSRn.NCPHA=0.

SPI data transfer hangs with CSR0.CSAAT==1 and MR.MODFDIS==0

When CSR0.CSAAT==1 and mode fault detection is enabled (MR.MODFDIS==0), the SPI

module will not start a data transfer.

Fix/Workaround

Disable mode fault detection by writing a one to MR.MODFDIS.

Disabling SPI has no effect on the SR.TDRE bit

Disabling SPI has no effect on the SR.TDRE bit whereas the write data command is filtered

when SPI is disabled. Writing to TDR when SPI is disabled will not clear SR.TDRE. If SPI is

disabled during a PDCA transfer, the PDCA will continue to write data to TDR until its buffer

is empty, and this data will be lost.

Fix/Workaround

Disable the PDCA, add two NOPs, and disable the SPI. To continue the transfer, enable the

SPI and PDCA.

Power Manager

functionnal

(OSC32CTRL.MODE=1

OSC32CTRL.MODE=2)

OSC32 clock output is not active even if the oscillation signal is present on XIN32/XOUT32

OSC32RDY bit may still set even if the CLK32 is not active.

External clock mode (OSC32CTRL.MODE=0) is not affected.

Fix/Workaround

Clock sources will not be stopped in STATIC sleep mode if the difference between

CPU and PBx division factor is too high

If the division factor between the CPU/HSB and PBx frequencies is more than 4 when going

to a sleep mode where the system RC oscillator is turned off, then high speed clock sources

will not be turned off. This will result in a significantly higher power consumption during the

Fix/Workaround

Before going to sleep modes where the system RC oscillator is stopped, make sure that the

factor between the CPU/HSB and PBx frequencies is less than or equal to 4.

相關(guān)PDF資料	PDF描述
MR80C52CXXX-12/883:D	8-BIT, MROM, 12 MHz, MICROCONTROLLER, CQCC44
MC80C52EXXX-12SC	8-BIT, MROM, 12 MHz, MICROCONTROLLER, CDIP40
MD80C52TXXX-16SHXXX:D	8-BIT, MROM, 16 MHz, MICROCONTROLLER, CDIP40
MR80C52CXXX-12SCR	8-BIT, MROM, 12 MHz, MICROCONTROLLER, CQCC44
MQ80C52XXX-25	8-BIT, MROM, 25 MHz, MICROCONTROLLER, CQFP44

相關(guān)代理商/技術(shù)參數(shù)	參數(shù)描述
SC80-M30/5	制造商:GardTec Inc 功能描述:SC Series 80 mm Steel Bright Nickel Chrome 4 Place Screw Mount Fan Guard
SC80-P10	制造商:GardTec Inc 功能描述:SC Series 80 mm Steel Bright Nickel Chrome 4 Place Screw Mount Fan Guard
SC80-P15/30	制造商:GardTec Inc 功能描述:SC Series Gardtec Fan guard
SC80-P15/45	制造商:GardTec Inc 功能描述:SC Series 80 mm Plastic Polyurethane Foam 4 Place Screw Mount Fan Guard
SC80-P40	制造商:GardTec Inc 功能描述:Plastic Fan Guard

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