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參數(shù)資料
| 型號(hào)： | SC68L198 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Octal UART with TTL compatibility at 3.3V and 5V supply voltages |
| 中文描述： | 八路與TTL兼容的UART在3.3V和5V電源電壓 |
| 文件頁(yè)數(shù)： | 46/49頁(yè) |
| 文件大?。?/td> | 358K |
| 代理商： | SC68L198 |
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Philips Semiconductors
Product specification
SC26C198 SC68C198
SC26L198 SC68L198
Octal UART with TTL compatibility at 3.3V
and 5V supply voltages
1995 May 1
381
SCLK
IACKN
CEN
W_RN
ADDRESS
DATA
DACKN
INVALID
DON’T CARE
C1
C2
C3
C4
VALID
t
CS
t
RWS
t
AS
t
AH
t
DD
DAK
DLY
C4
DAK
DLY
CEN
t
DF
INVALID
INVALID
INVALID
DON’T CARE
NOTE:
CEN must not be active during an IACKN cycle. If CEN is active, IACKN will be ignored
and a normal read or write will be executed according to W_RN. In the synchronous
mode, extended IACKN signal will start another IACKN. (This may not be desired, but
is allowed.)
SD00525
Figure 6. Basic IACKN Cycle, ASYNC/SYNC
C1 and C2 should be chosen according to the
crystal manufacturer’s specification.
C1 and C2 values will include any parasitic
capacitance of the wiring.
f
X1
+5V
1K required for
TTL gate.
X1
X2
C1 = C2 = 24pF FOR C
L
= 20PF
X1
X2
3.6864MHz
3pF
4pF
50 KOHMs
TO
150 KOHMs
26C94
NOTES:
C1 and C2 should be based on manufacturer’s specification.
X1 and X2 parasitic capacitance IS 1-2pF AND 3-5pF, respectively.
GAIN:
at 4MHz 8 to 14db; at 8MHz 2 to 6db
PHASE: at 4MHz 272
°
to 276
°
; at 8MHz 272
°
to 276
°
The above figures for 5V operation. Operation at 3V is to be determined.
TYPICAL CRYSTAL SPECIFICATION
2 – 4MHZ
12 – 32pF
PARALLEL RESONANT, FUNDAMENTAL MODE
FREQUENCY:
LOAD CAPACITANCE (C
L
):
TYPE OF OPERATION:
NC
C1
C2
MUX
To
remainder
of circuit
÷
2
38.4kHz CLOCK
BRG
TO I/O CHANGE-OF-STATE DETECTORS
22
STANDARD
RATES
X1 L/H
T/R f
X1
SD00198
Figure 7. X1/X2 Communication Crystal Clock
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