參數(shù)資料
型號(hào): SC16IS762IPW-T
廠商: NXP Semiconductors
文件頁數(shù): 7/60頁
文件大小: 0K
描述: IC UART DUAL I2C/SPI 28-TSSOP
標(biāo)準(zhǔn)包裝: 2,500
特點(diǎn): 低電流
通道數(shù): 2,DUART
FIFO's: 64 字節(jié)
規(guī)程: RS232,RS485
電源電壓: 2.5V, 3.3V
帶自動(dòng)流量控制功能:
帶故障啟動(dòng)位檢測(cè)功能:
帶調(diào)制解調(diào)器控制功能:
安裝類型: 表面貼裝
封裝/外殼: 28-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 28-TSSOP
包裝: 帶卷 (TR)
配用: 568-4000-ND - DEMO BOARD SPI/I2C TO DUAL UART
568-3510-ND - DEMO BOARD SPI/I2C TO UART
SC16IS752_SC16IS762
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 9 — 22 March 2012
15 of 60
NXP Semiconductors
SC16IS752; SC16IS762
Dual UART with I2C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
7.5.1 Interrupt mode operation
In Interrupt mode (if any bit of IER[3:0] is 1) the host is informed of the status of the
receiver and transmitter by an interrupt signal, IRQ. Therefore, it is not necessary to
continuously poll the Line Status Register (LSR) to see if any interrupt needs to be
serviced. Figure 8 shows Interrupt mode operation.
7.5.2 Polled mode operation
In Polled mode (IER[3:0] = 0000) the status of the receiver and transmitter can be
checked by polling the Line Status Register (LSR). This mode is an alternative to the FIFO
Interrupt mode of operation where the status of the receiver and transmitter is
automatically known by means of interrupts sent to the CPU. Figure 9 shows FIFO Polled
mode operation.
Fig 8.
Interrupt mode operation
11
IIR
IER
THR
RHR
HOST
IRQ
002aab042
read IIR
Fig 9.
FIFO Polled mode operation
00
LSR
IER
THR
RHR
HOST
read LSR
002aab043
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