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參數資料
| 型號： | SC16IS760IPW |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 連接器件 |
| 英文描述： | Single UART with I2C-bus-SPI interface, 64 bytes of transmit and receive FIFOs, IrDA SIR built-in support |
| 封裝： | SC16IS740IPW/Q900<SOT403-1 (TSSOP16)|<<http://www.nxp.com/packages/SOT403-1.html<1<Always Pb-free,;SC16IS740IPW<SOT403-1 (TSSOP16)|<<http://www.nxp.com/packages/SOT403-1. |
| 文件頁數： | 34/62頁 |
| 文件大?。?/td> | 308K |
| 代理商： | SC16IS760IPW |
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SC16IS740_750_760_6
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 06 — 13 May 2008
34 of 62
NXP Semiconductors
SC16IS740/750/760
Single UART with I
2
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
8.19 I/O Control register (IOControl)
This register is only available on the SC16IS750 and SC16IS760.
Remark:
As I/O pins, the direction, state, and interrupt of GPIO4 to GPIO7 are controlled
by the following registers: IODir, IOState, IOIntEna, and IOControl. The state of CD, RI,
DSR pins will not be reflected in MSR[7:5] or MSR[3:1], and any change of state on these
three pins will not trigger a modem status interrupt (even if enabled via IER[3]), and the
state of the DTR pin cannot be controlled by MCR[0].
As modem CD, RI, DSR pins, the status at the input of these three pins can be read from
MSR[7:5] and MSR[3:1], and the state of DTR pin can be controlled by MCR[0]. Also, if
modem status interrupt bit is enabled, IER[3], a change of state of RI, CD, DSR pins will
trigger a modem interrupt. Bit[7:4] of the IODir, IOState, and IOIntEna registers will not
have any effect on these three pins.
Table 30.
Bit
7:4
3
IOControl register bits description
Symbol
Description
-
reserved for future use
SRESET
software reset
A write to bit will reset the device. Once the device is reset this bit is
automatically set to ‘0’
-
reserved for future use
GPIO[7:4] or
modem pins
pins.
0 = GPIO[7:4] behave as I/O pins
1 = GPIO[7:4] behave as RI, CD, DTR, DSR
IOLATCH
enable/disable inputs latching
0 = input values are not latched. A change in any input generates an
interrupt. A read of the input register clears the interrupt. If the input
goes back to its initial logic state before the input register is read,
then the interrupt is cleared.
1 = input values are latched. A change in the input generates an
interrupt and the input logic value is loaded in the bit of the
corresponding input state register (IOState). A read of the IOState
register clears the interrupt. If the input pin goes back to its initial
logic state before the interrupt register is read, then the interrupt is
not cleared and the corresponding bit of the IOState register keeps
the logic value that initiates the interrupt.
2
1
This bit programs GPIO[7:4] as I/O pins or modem RI, CD, DTR, DSR
0
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相關代理商/技術參數 |
參數描述 |
|---|---|
| SC16IS760IPW,112 | 功能描述:UART 接口集成電路 I2C/SPI-UARTBRIDGE W/IRDA AND GPIO RoHS:否 制造商:Texas Instruments 通道數量:2 數據速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16IS760IPW,128 | 功能描述:UART 接口集成電路 I2C/SPI-UARTBRIDGE RoHS:否 制造商:Texas Instruments 通道數量:2 數據速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16IS760IPW112 | 制造商:Rochester Electronics LLC 功能描述: 制造商:NXP 功能描述: 制造商:NXP Semiconductors 功能描述: |
| SC16IS760IPW-F | 功能描述:UART 接口集成電路 I2C/SPI-UARTBRIDGE W/IRDA AND GPIO RoHS:否 制造商:Texas Instruments 通道數量:2 數據速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16IS760IPW-S | 功能描述:IC UART I2C/SPI 24-TSSOP RoHS:是 類別:集成電路 (IC) >> 接口 - UART（通用異步接收器/發(fā)送器） 系列:- 標準包裝:250 系列:- 特點:* 通道數:2，DUART FIFO's:16 字節(jié) 規(guī)程:RS232，RS485 電源電壓:2.25 V ~ 5.5 V 帶并行端口:- 帶自動流量控制功能:是 帶IrDA 編碼器/解碼器:是 帶故障啟動位檢測功能:是 帶調制解調器控制功能:是 帶CMOS:是 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應商設備封裝:48-TQFP（7x7） 包裝:托盤 其它名稱:XR16L2551IM-F-ND |
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