參數(shù)資料
型號(hào): SC16C852LIBS
廠商: NXP Semiconductors N.V.
元件分類: 收發(fā)器
英文描述: 1.8 V dual UART, 5 Mbit-s (max.) with 128-byte FIFOs, infrared (IrDA) and 16 mode or 68 mode bus interface
封裝: SC16C852LIB<SOT313-2 (LQFP48)|<<http://www.nxp.com/packages/SOT313-2.html<1<Always Pb-free,;SC16C852LIB<SOT313-2 (LQFP48)|<<http://www.nxp.com/packages/SOT313-2.html<1
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代理商: SC16C852LIBS
SC16C852L
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 4 — 1 February 2011
42 of 64
NXP Semiconductors
SC16C852L
1.8 V dual UART with 128-byte FIFOs and IrDA encoder/decoder
8. Limiting values
[1]
V
n
should not exceed 2.5 V.
9. Static characteristics
[1]
Hysteresis input.
[2]
Except XTAL2.
[3]
Sleep current might be higher if there is any activity on the UART data bus during Sleep mode.
[4]
Activate by LOWPWR pin.
Table 37.
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
V
DD
supply voltage
V
n
voltage on any other pin
T
amb
ambient temperature
T
stg
storage temperature
P
tot
/pack
total power dissipation per package
Limiting values
Conditions
Min
-
Max
2.5
V
DD
+ 0.3
+85
+150
500
Unit
V
V
C
C
mW
[1]
V
SS
0.3
40
65
-
operating in free air
Table 38.
T
amb
=
40
C to +85
C; V
DD
= 1.65 V to 1.95 V; unless otherwise specified.
Symbol
Parameter
V
IL(clk)
LOW-level clock input voltage
V
IH(clk)
HIGH-level clock input voltage
V
IL
LOW-level input voltage
Static characteristics
Conditions
XTAL1 pin
XTAL1 pin
except XTAL1 clock,
LOWPWR pin
LOWPWR pin
except XTAL1 clock,
LOWPWR pin
LOWPWR pin
I
OL
= 2 mA
I
OH
=
800
A
Min
-
1.35
-
Typ
-
-
-
Max
0.25
-
0.45
Unit
V
V
V
[1]
-
-
-
0.45
-
V
V
V
IH
HIGH-level input voltage
1.35
[1]
1.35
-
-
-
-
-
-
-
-
-
-
-
-
0.35
-
1
1
30
30
2
5
5
5
V
V
V
A
A
A
A
mA
A
A
pF
V
OL
V
OH
I
LIL
I
LIH
I
L(clk)
LOW-level output voltage
HIGH-level output voltage
LOW-level input leakage current
HIGH-level input leakage current
clock leakage current
[2]
-
[2]
1.45
-
-
-
-
-
LOW-level
HIGH-level
f = 5 MHz
I
DD
I
DD(sleep)
I
DD(lp)
C
i
supply current
sleep mode supply current
low-power mode supply current
input capacitance
[3]
-
[4]
-
-
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