參數(shù)資料
型號: SC16C850LIBS
廠商: NXP Semiconductors N.V.
元件分類: 收發(fā)器
英文描述: 1.8 V single UART, 5 Mbit-s (max.) with 128-byte FIFOs, infrared (IrDA) and 16 mode or 68 mode parallel bus interface
封裝: SC16C850LIB<SOT313|<<<1<Always Pb-free,;SC16C850LIB<SOT313|<<<1<Always Pb-free,;SC16C850LIB<SOT313|<<<1<Always Pb-free,;SC16C850LIBS<SOT617-1 (HVQFN3
文件頁數(shù): 39/55頁
文件大?。?/td> 1029K
代理商: SC16C850LIBS
SC16C850L
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 5 — 1 February 2011
39 of 55
NXP Semiconductors
SC16C850L
1.8 V single UART with 128-byte FIFOs and IrDA encoder/decoder
10. Dynamic characteristics
[1]
Applies to external clock, crystal oscillator max 24 MHz.
[2]
Maximum frequency =
[3]
10 % of the data bus output voltage level.
[4]
RCLK is an internal signal derived from Divisor Latch LSB (DLL) and Divisor Latch MSB (DLM) divisor latches.
Table 37.
T
amb
=
40
C to +85
C; V
DD
= 1.65 V to 1.95 V; unless otherwise specified.
Symbol
Parameter
t
WH
pulse width HIGH
t
WL
pulse width LOW
t
w(clk)
clock pulse width
f
XTAL1
frequency on pin XTAL1
t
su(A)
address set-up time
t
h(A)
address hold time
t
d(CS-IOR)
delay time from CS to IOR
t
w(IOR)
IOR pulse width time
t
h(IOR-CS)
hold time from IOR to chip select
t
d(IOR)
IOR delay time
t
d(IOR-Q)
delay time from IOR to data output
t
dis(IOR-QZ)
disable time from IOR to high-impedance
data output
[3]
t
d(CSL-IOWL)
delay time from CS LOW to IOW LOW
t
w(IOW)
IOW pulse width time
t
h(IOW-CS)
hold time from IOW to CS
t
d(IOW)
IOW delay time
t
su(D-IOWH)
set-up time from data input to IOW HIGH
t
h(IOWH-D)
data input hold time after IOW HIGH
t
d(IOW-Q)
delay time from IOW to data output
t
d(modem-INT)
delay time from modem to INT
t
d(IOR-INTL)
delay time from IOR to INT LOW
t
d(stop-INT)
delay time from stop to INT
t
d(start-INT)
delay time from start to INT
t
d(IOW-TX)
delay time from IOW to TX
t
d(IOW-INTL)
delay time from IOW to INT LOW
t
w(RESET)
pulse width on pin RESET
N
baud rate divisor
Dynamic characteristics - Intel or 16 mode
Conditions
Min
6
6
12.5
Typ
-
-
-
-
-
-
-
-
-
-
-
-
Max
-
-
-
80
-
-
-
-
-
-
40
20
Unit
ns
ns
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
[1][2]
-
0
10
5
20
0
10
-
-
25 pF load
25 pF load
5
10
0
10
5
5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
50
50
50
1T
RCLK
1T
RCLK
24T
RCLK
50
-
(2
16
1)
ns
ns
ns
ns
ns
ns
ns
ns
ns
s
s
s
ns
ns
25 pF load
25 pF load
25 pF load
25 pF load
25 pF load
25 pF load
25 pF load
[4]
-
[4]
-
[4]
8T
RCLK
-
10
1
t
w clk
--------------
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