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參數(shù)資料
| 型號： | SC16C754IB80 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Quad UART with 64-byte FIFO |
| 中文描述： | 4 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQFP80 |
| 封裝： | 12 X 12 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-315-1, LQFP-80 |
| 文件頁數(shù)： | 29/49頁 |
| 文件大?。?/td> | 622K |
| 代理商： | SC16C754IB80 |
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Philips Semiconductors
SC16C754
Quad UART with 64-byte FIFO
Product data
Rev. 04 — 19 June 2003
29 of 49
9397 750 11618
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
7.10 Enhanced feature register (EFR)
This 8-bit register enables or disables the enhanced features of the UART.
Table 19
shows the enhanced feature register bit settings.
Table 18:
Priority
level
1
2
2
3
4
5
Interrupt priority list
IIR[5]
IIR[4]
IIR[3]
IIR[2]
IIR[1]
IIR[0]
Source of the interrupt
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
0
0
0
1
1
1
0
0
0
1
0
0
1
0
0
0
0
0
0
0
0
Receiver Line Status error
Receiver time-out interrupt
RHR interrupt
THR interrupt
Modem interrupt
Received Xoff signal/
special character
CTS, RTS change of state
from active (LOW) to
inactive (HIGH)
6
1
0
0
0
0
0
Table 19:
Bit
7
Enhanced Feature Register bits description
Symbol
Description
EFR[7]
CTS flow control enable.
Logic 0 = CTS flow control is disabled (normal default condition).
Logic 1 = CTS flow control is enabled. Transmission will stop when a
HIGH signal is detected on the CTS pin.
EFR[6]
RTS flow control enable.
Logic 0 = RTS flow control is disabled (normal default condition).
Logic 1 = RTS flow control is enabled. The RTS pin goes HIGH when
the receiver FIFO HALT trigger level TCR[3:0] is reached, and goes
LOW when the receiver FIFO RESUME transmission trigger level
TCR[7:4] is reached.
EFR[5]
Special character detect.
Logic 0 = Special character detect disabled (normal default condition).
Logic 1 = Special character detect enabled. Received data is
compared with Xoff-2 data. If a match occurs, the received data is
transferred to FIFO and IIR[4] is set to a logical 1 to indicate a special
character has been detected.
EFR[4]
Enhanced functions enable bit.
Logic 0 = Disables enhanced functions and writing to IER[7:4],
FCR[5:4], MCR[7:5].
Logic 1 = Enables the enhanced function IER[7:4], FCR[5:4], and
MCR[7:5] can be modified, i.e., this bit is therefore a write enable.
EFR[3:0]
Combinations of software flow control can be selected by programming
these bits. See
Table 3 “Software flow control options (EFR[0:3])” on
page 10
.
6
5
4
3-0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SC16C754IB80,528 | 功能描述:UART 接口集成電路 16C 2.5V-5V 4CH UART 64B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C754IB80,551 | 功能描述:UART 接口集成電路 16C 2.5V-5V 4CH UART 64B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C754IB80,557 | 功能描述:UART 接口集成電路 16C 2.5V-5V 4CH UART 64B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C850 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:2.5 V to 3.3 V UART, 5 Mbit/s (max.) with 128-byte FIFOs, infrared (IrDA), and 16 mode or 68 mode parallel bus interface |
| SC16C850IBS | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:2.5 V to 3.3 V UART, 5 Mbit/s (max.) with 128-byte FIFOs, infrared (IrDA), and 16 mode or 68 mode parallel bus interface |
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