參數(shù)資料
型號: SC16C752BIBS
廠商: NXP Semiconductors N.V.
元件分類: 收發(fā)器
英文描述: 5 V, 2.2 V and 2.5 V dual UART, 5 Mbit-s (max.), with 64-byte FIFOs
封裝: SC16C752BIB48<SOT313-2 (LQFP48)|<<http://www.nxp.com/packages/SOT313-2.html<1<Always Pb-free,;SC16C752BIB48<SOT313-2 (LQFP48)|<<http://www.nxp.com/packages/SOT313-2.html&
文件頁數(shù): 34/47頁
文件大小: 945K
代理商: SC16C752BIBS
SC16C752B
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 6 — 30 November 2010
34 of 47
NXP Semiconductors
SC16C752B
5 V, 2.2 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs
[5]
Except XTAL2, V
OL
= 1 V typical.
These junction temperatures reflect simulated conditions. Absolute maximum junction temperature is 150
°
C. The customer is
responsible for verifying junction temperature.
[6]
[7]
Measurement condition, normal operation other than Sleep mode:
V
CC
= 3.3 V; T
amb
= 25
°
C. Full duplex serial activity on all two serial (UART) channels at the clock frequency specified in the
recommended operating conditions with divisor of 1.
[8]
Sleep mode current might be higher if there is activity on the UART data bus during Sleep mode.
11. Dynamic characteristics
Table 26.
T
amb
=
40
°
C to +85
°
C; V
CC
= 2.5 V, 3.3 V
±
10 % or 5 V
±
10 %, unless specified otherwise.
Symbol
Parameter
Dynamic characteristics
Conditions
V
CC
= 2.5 V
Min
10
20
-
-
10
25
-
-
V
CC
= 3.3 V or 5 V Unit
Min
Max
0
20
-
26
-
15
10
25
-
33
-
24
Max
-
-
77
15
-
-
100
100
t
d1
t
d2
t
d3
t
d4
t
d5
t
d6
t
d7
t
d8
t
d9
t
d10
t
d11
t
d12
t
d13
t
d14
t
d15
t
d16
t
d17
t
d18
t
d19
IOR delay from chip select
read cycle delay
delay from IOR to data
data disable time
IOW delay from chip select
write cycle delay
delay from IOW to output
delay to set interrupt from modem input
-
-
ns
ns
ns
ns
ns
ns
ns
ns
25 pF load
25 pF load
25 pF load
-
-
25 pF load
25 pF load
delay to reset interrupt from IOR
delay from stop to set interrupt
delay from IOR to reset interrupt
delay from start to set interrupt
delay from IOW to transmit start
delay from IOW to reset interrupt
delay from stop to set RXRDYn
delay from IOR to reset RXRDYn
delay from IOW to set TXRDYn
delay from start to reset TXRDYn
delay between successive assertion of
IOW and IOR
chip select hold time from IOR
chip select hold time from IOW
data hold time
address hold time
hold time from XTAL1 clock HIGH-to-LOW
transition to IOW or IOR release
clock cycle period
clock cycle period
frequency on pin XTAL1
pulse width on pin RESET
address set-up time
25 pF load
-
-
-
-
8
-
-
-
-
-
-
100
-
-
-
-
8
-
-
-
-
-
-
24
ns
s
ns
ns
s
ns
s
ns
ns
s
ns
1T
RCLK
[1]
100
100
24T
RCLK
[1]
100
1T
RCLK
[1]
100
100
16T
RCLK
[1]
20
1T
RCLK
[1]
29
100
24T
RCLK
[1]
70
1T
RCLK
[1]
75
70
16T
RCLK
[1]
20
25 pF load
t
h1
t
h2
t
h3
t
h4
t
h5
0
0
15
0
20
-
-
-
-
-
0
0
15
0
20
-
-
-
-
-
ns
ns
ns
ns
ns
t
p1
t
p2
f
XTAL1
t
w(RESET)
t
su1
10
10
-
100
0
-
-
6
6
-
-
-
ns
ns
MHz
ns
ns
[2]
48
-
-
80
-
-
[3]
40
0
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SC16C752BIBS-S 功能描述:UART 接口集成電路 2CH. UART 64B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel